<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPCXpresso IDEのトピックRe: Cortex-M3 Wandering Code</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/Cortex-M3-Wandering-Code/m-p/535166#M4491</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Pellek on Tue May 22 00:36:06 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;In User Manual UM10360 chapter 34, you got a complete guide on cortexM3. However i think you got there the instructions list (page 647), but not the opcodes of the instructions.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Maybe on ARM website ?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 00:23:42 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T00:23:42Z</dc:date>
    <item>
      <title>Cortex-M3 Wandering Code</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Cortex-M3-Wandering-Code/m-p/535165#M4490</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Andrew on Mon May 21 18:35:27 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi there,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; Does anyone know what happens if code on a Cortex-M3 MCU such as LPC1343 jumps accidentally to erased flash. So basically my question is how the MCU will interpret 0xFFFF op-code? &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; Where can I find list of op-codes for ARM Cortex-M3 assembler instructions?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cheers,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Andrew&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 00:23:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Cortex-M3-Wandering-Code/m-p/535165#M4490</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T00:23:41Z</dc:date>
    </item>
    <item>
      <title>Re: Cortex-M3 Wandering Code</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Cortex-M3-Wandering-Code/m-p/535166#M4491</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Pellek on Tue May 22 00:36:06 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;In User Manual UM10360 chapter 34, you got a complete guide on cortexM3. However i think you got there the instructions list (page 647), but not the opcodes of the instructions.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Maybe on ARM website ?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 00:23:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Cortex-M3-Wandering-Code/m-p/535166#M4491</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T00:23:42Z</dc:date>
    </item>
    <item>
      <title>Re: Cortex-M3 Wandering Code</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Cortex-M3-Wandering-Code/m-p/535167#M4492</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Ex-Zero on Tue May 22 00:50:48 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Just try it yourself :rolleyes:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Branch to an empty address with:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
__asm("b 0x440");
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;SPAN&gt;And you will receive a Hard Fault :eek:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;UM:&lt;/SPAN&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;Hard fault&lt;BR /&gt;A hard fault is an exception that occurs because of an error during exception processing, or because an exception cannot be managed by any other exception mechanism. Hard faults have a fixed priority of -1, meaning they have higher priority than any exception with configurable priority.&lt;BR /&gt;&lt;/SPAN&gt;&lt;HR /&gt;&lt;SPAN&gt;Appendix of UM is including a short description of instruction set.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Also you can find further information at ARM:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cortex&amp;amp;#8482;-M3 Technical Reference Manual:&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://" rel="nofollow noopener noreferrer" target="_blank"&gt;http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337i/index.html&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cortex&amp;amp;#8482;-M3 Devices Generic User Guide&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://" rel="nofollow noopener noreferrer" target="_blank"&gt;http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0552a/index.html&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;or more general Resources at 'Resources of':&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://" rel="nofollow noopener noreferrer" target="_blank"&gt;http://www.arm.com/products/processors/cortex-m/cortex-m3.php&lt;/A&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 00:23:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Cortex-M3-Wandering-Code/m-p/535167#M4492</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T00:23:42Z</dc:date>
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  </channel>
</rss>

