LPCXpresso IDEのトピックUsing the watchdog on LPC122x

Using the watchdog on LPC122x

lpcware — Thu, 16 Jun 2016 01:37:58 GMT

Content originally posted in LPCWare by IanJames on Thu Jun 20 07:03:21 MST 2013
Hi,

I would like to use the watchdog timeout feature on the LPC1224.

Using CMSIS I have removed the define symbol __DISABLE_WATCHDOG and recompiled. Now when I program the device as expected the device does continual resets.

I assumed that 'feeding' the watchdog timer thus:

LPC_WWDT->FEED = 0xAA;
LPC_WWDT->FEED = 0x55;

would prevent the resets - alas it does not.

The startup code source file states this:

// ************************************************************
// The LPC12xx family start up with the Windowed Watchdog timer
// enabled, and if the application code does not continually
// feed the WWDT, then a reset will occur. This behavior will
// prevent the debug tools functioning correctly - and thus
// when a debug connection is made, the tools will disable the
// WWDT. However this will mean that behavior of your application
// may be different depending upon whether the debugger is
// connected or not. The below code will disable the WWDT in the
// same way that the debugger does, so that behavior will not
// depend upon whether the debugger is connected or not.
// If you do not want to connect the debugger to the target and
// require the default LPC12xx WWDT operation, then undefine the
// symbol __DISABLE_WATCHDOG.
// For more information, see the LPC12xx User Manual.

which I understand.

Can anyone explain what the default settings are for the Windowed Watchdog timer are and what I need to do to prevent the resets.

Thanks

Re: Using the watchdog on LPC122x

lpcware — Thu, 16 Jun 2016 01:37:59 GMT

Content originally posted in LPCWare by nkarakotas on Sun Jun 23 05:09:12 MST 2013
Hello Ian,

Yet again we meet in a forum! On nxp's now ahhhh?? How is Colin?

Nick

Re: Using the watchdog on LPC122x

lpcware — Thu, 16 Jun 2016 01:38:00 GMT

Content originally posted in LPCWare by IanJames on Sun Jun 23 23:04:39 MST 2013
Hi Nick,

Its been a while - I assume you are back home in Greece or are you now in Australia?.

Yes we have changed to NXP LPC122x series for our boards, the the face of it they are more powerful and cheaper then AVRs - but a bit more complicated to configure.

I am trying to get the Watchdog to generate interrupts by enabling it and then 'forgetting' to feed it. It would appear that the Watchdog Timer fails to start.

I have wasted so much time on this and there is little help/advice available - just the manual which I have read loads of times.

Are you still working on your Weather Stations?, and what processors are you using for your designs.

Colin is well, nothing really changes, we just get older!

Ian

Re: Using the watchdog on LPC122x

lpcware — Thu, 16 Jun 2016 01:38:00 GMT

Content originally posted in LPCWare by graynomad on Mon Jun 24 02:12:37 MST 2013
As it's a windowed WD maybe you are feeding it too fast.

What's the value in the WINDOW register, that will determine the low end of the window. I believe it defaults at reset to the WD value ie, no window, but it might be worth checking.

Re: Using the watchdog on LPC122x

lpcware — Thu, 16 Jun 2016 01:38:01 GMT

Content originally posted in LPCWare by CodeRedSupport on Mon Jun 24 02:27:25 MST 2013
LPCXpresso doesn't ship with a Watchdog example for the LPC12, but NXP do have some WDT example code that you might find useful reference at:

http://www.lpcware.com/content/nxpfile/lpc12xx-cmsis-driver-library-keil

Regards,
CodeRedSupport

Re: Using the watchdog on LPC122x

lpcware — Thu, 16 Jun 2016 01:38:01 GMT

Content originally posted in LPCWare by IanJames on Tue Jun 25 06:55:16 MST 2013
This is what I have found so far..........

I configure the Watchdog for Chip Reset thus:

LPC_SYSCON->WDTOSCCTRL     = 0x003F;    // 001 11111 ~8kHz
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<15);   // Enable clock to WDT
LPC_SYSCON->PDRUNCFG      &= ~(0x1<<6);// ensure watchdog is powered
LPC_WWDT->CLKSEL = 0x01;// Watchdog Oscillator as source 0001
LPC_WWDT->WARNINT = 0x00;// Interrupt warning value
NVIC_EnableIRQ(WDT_IRQn);// Enable the interrupt
LPC_WWDT->TC      = 0xFF; // once WDEN is set, the
LPC_WWDT->MOD = 0x0003;                 // start in Chip Reset Mode
__disable_irq();
LPC_WWDT->FEED = 0xAA;/* Feeding sequence */
LPC_WWDT->FEED = 0x55;
__enable_irq();

/* Make sure feed sequence executed properly */
for (i = 0; i < 0x80000; i++);

If I compile for Release mode, Program over the SWD, power off remove programmer and power on then everything appears to work correctly i.e. if I feed the watchdog at regular intervals then the processor runs if I disable feeding then the processor resets.

If I compile for Debug mode and repeat the above then after cycling the power then the processor appears to be in an unknown state - I know this because opon power up a single byte should be transmitted out of the serial port but nothing appears.

The only way to recover is to reprogram the chip.

Any thoughts anyone?

One other point, the manual suggests that if the processor is reset due to a Watchdog Reset then the bit 2 in the LPC_WWDT->MOD register should be set, but it doesn't appear to be.

**** Update ****

The register LPC_SYSCON->SYSRESSTAT contains the reset information [POR,EXT,WDT,BOD,SYS]