LPC-Link and the Reset Line

lpcware — Wed, 15 Jun 2016 21:38:20 GMT

Content originally posted in LPCWare by MikeSimmonds on Thu Feb 07 08:43:06 MST 2013
[FONT=Trebuchet MS][SIZE=1]I have a separated LPC-Link plus ribbon cable to the custom PCB.

When it is connected, USB end and ribbon end, but the DFU download
has not occured (i.e. have not started debugging yet) the reset switch
on the PCB works as expected.

As soon as a debug session is started (and even after I terminate the
debug session) the LPC-Link holds reset high; so strongly the the reset
switch cannot ground the reset line.
My PCB has a 470K pull up and a 10K series resistor on the switch/reset line.

From the LPCXpresso XXX schematics, the reset line is driven from a
standard 74125 buffer, and the are buffer enables for all the debug
lines.

Surely, when debugging is terminated, we should expect the debug firmware
to disable the jTAG/SWD and reset lines on the buffers.
This does not seem to be the case, and there is a high on the reset line
until I disconnect the USB cable (and re-insert).

[Update: my hardware colleague tells me that the enable lines are high
(inactive) after debug terminates so the 125 outputs are tri-state.
This is apparently still enough to override the reset switch (a standard
connect to ground arrangement).]

This behaviour is mildly annoying, but not at all critical.

Does anyone care to comment?

Mike

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LPCXpresso IDEのトピックLPC-Link and the Reset Line

LPC-Link and the Reset Line