topic Re: jump and hard fault handler in LPCXpresso IDE

jump and hard fault handler

lpcware — Wed, 15 Jun 2016 21:33:28 GMT

Content originally posted in LPCWare by Forrest on Mon Sep 12 10:33:47 MST 2011
Hi all,

I start write my own bootloader so now I have first problem with calling the application function (main). I use lpc1768.
[U][B]Modify cr_startup_lpc17.c[/B][/U]

void ResetISR(void) {
    unsigned long *pulSrc, *pulDest;
    pulSrc = &_etext;
    for(pulDest = &_data; pulDest < &_edata; )
    {
        *pulDest++ = *pulSrc++;
    }

    __asm("    ldr     r0, =_bss\n"
          "    ldr     r1, =_ebss\n"
          "    mov     r2, #0\n"
          "    .thumb_func\n"
          "zero_loop:\n"
          "        cmp     r0, r1\n"
          "        it      lt\n"
          "        strlt   r2, [r0], #4\n"
          "        blt     zero_loop");

[B]/* Insteed of simple calling main at this place I need jump to adress 0x1000 where I have linked main application function. */[/B]

#if 1 //first sollution
    void (*fptr)(void);
    fptr = (void (*)(void))0x1000;
    fptr();
#else //second sollution
    __asm("ldr r3,=0x1000");
    __asm("ldr r2,[r3]");
    __asm("blx r2");
#endif

    while (1);
}

So problem si that I use any of sollutions (1,2) always cpu stop at Hard Fault Handler. I dont know why? What is bad at this code?

[U][B]LINKER SCRIPT[/B][/U]
.text :
    {
        KEEP(*(.isr_vector))
        . = 0x1000;
        KEEP(*(.main_section))
        *(.text*)
        *(.rodata*)

    } > MFlash512

[U][B]MAIN FUNCTION [/B][/U]
/*-------------------------------- MAIN --------------------------------------*/
__attribute__ ((section(".main_section")))
int main(void)
{

So where I have misteke? I dont realise why mcu jump to hard fault handler?
Thanks so much.

Re: jump and hard fault handler

lpcware — Wed, 15 Jun 2016 21:33:29 GMT

Content originally posted in LPCWare by CodeRedSupport on Mon Sep 12 23:54:57 MST 2011
You need to ensure that the register you are using in your BLX instruction to contain the target address actually contains [I]<target address + 1>[/I] (ie it has the bottom bit set). Thus in your case you need to use 0x1001.

This is needed in order to tell the processor to execute from the target address in Thumb state (even though Cortex-M3 only implements Thumb state and not ARM state). This is thus largely for historical reasons.

For more details please browse the appropriate ARM documentation....

http://support.code-red-tech.com/CodeRedWiki/ArmCpuInfo

Regards,
CodeRedSupport.

Re: jump and hard fault handler

lpcware — Wed, 15 Jun 2016 21:33:29 GMT

Content originally posted in LPCWare by Forrest on Tue Sep 13 00:58:36 MST 2011
Thanks You are right. I change address from 0x1000 to 0x1001 and now all is ok.
This is strange behaviour, but Im happy for your reply.