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    <title>topic Re: LPC1768 CAN DLC problem in LPCXpresso IDE</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/LPC1768-CAN-DLC-problem/m-p/589531#M28668</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by jchisolm on Thu Nov 03 21:31:37 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;solved - programming error on receive side.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Sorry for using up the bandwidth.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 22:49:08 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T22:49:08Z</dc:date>
    <item>
      <title>LPC1768 CAN DLC problem</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/LPC1768-CAN-DLC-problem/m-p/589530#M28667</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by jchisolm on Wed Nov 02 13:07:12 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I have 2 identical boards, LPC1768 each using CAN1.&amp;nbsp; I have some test code based on the CAN led demo.&amp;nbsp; The processors are running at 100Mhz and the CAN bus is at 100K.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I set up the transmit for DLC=1, 2, 3, 4 ... 8 with data values of&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data 1= 0x11&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data 2= 0x22&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;...&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data 7= 0x77&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;data 8=0x88&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;so I can quickly identify the bytes sent and received.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The problem:&amp;nbsp; If I set the xmit DLC to 1 through 7 all is OK in the received messages.&amp;nbsp;&amp;nbsp; But if I set the xmit DLC to 8 I get byte 7 sent again in the byte 8 slot and the receive frame (RFS) register says the DLC is 7.&amp;nbsp; I get no errors.&amp;nbsp; I have put a CAN bus analyzer on the bus and the analyzer sees the correct frame with a dlc of 8 and 0x88 in the 8th byte so I know the transmit side is working OK.&amp;nbsp; It is something in the receive side.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I find it hard to belive that something as fundamental as DLC = 8 would not be working so I'm looking for any pointers to configuration isssues or other things I might look for to help figure this out.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am only using CAN1 and CAN 2 is not powered up but I tried powering up CAN2 with the same results.&amp;nbsp; I cannot test CAN2 as those pins are in use for other functions. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 22:49:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/LPC1768-CAN-DLC-problem/m-p/589530#M28667</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T22:49:07Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1768 CAN DLC problem</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/LPC1768-CAN-DLC-problem/m-p/589531#M28668</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by jchisolm on Thu Nov 03 21:31:37 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;solved - programming error on receive side.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Sorry for using up the bandwidth.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 22:49:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/LPC1768-CAN-DLC-problem/m-p/589531#M28668</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T22:49:08Z</dc:date>
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