topic Re: gpio Schematic/logic in LPCXpresso IDE

gpio Schematic/logic

lpcware — Wed, 15 Jun 2016 21:25:35 GMT

Content originally posted in LPCWare by irven on Mon Sep 24 01:19:01 MST 2012
hi all,

i want to understand how the LPC pins working.
so i want to know the step between a register and the output/input port.
i didnÂ´t want to know about the software i know how i configure ports!
I want to know the hardeware. I couldnÂ´t find anythink about it in the usermanual or somewhere else.
it would be very helpful if someone know where i can find some schematics.
thanks a lot.

Re: gpio Schematic/logic

lpcware — Wed, 15 Jun 2016 21:25:36 GMT

Content originally posted in LPCWare by cfb on Mon Sep 24 01:45:48 MST 2012
I do not understand your question. It might help if you tell us why you are asking. e.g. Just curious? You are trying to solve a particular problem? What problem?

Also which LPC device? There are significant differences in pin usage for each family of LPC devices.

Are you using an LPCXpresso board? If so, which board?

Owners of LPCXpresso boards can register for support and then download the schematics for that board from the Embedded Artists site:

http://www.embeddedartists.com/support/overview

Re: gpio Schematic/logic

lpcware — Wed, 15 Jun 2016 21:25:37 GMT

Content originally posted in LPCWare by irven on Mon Sep 24 02:01:26 MST 2012
i am working with a LPCXpresso1769.
and i have no problem to solve i making a littel tutorial for some students in the microcontroller lab. and i want to explain them how simpl stuff like input output is working.
for example wath happen when i wrote to the FIODIR register 1. it set the direction of the output! but how ist the connection between the register and the pin.

http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf

this is a discription for gpio ports from texas instruments. on page 11 is a picture of the architecture and i would find some think similar for the nxp lpc...
i think there are some differences.

Re: gpio Schematic/logic

lpcware — Wed, 15 Jun 2016 21:25:37 GMT

Content originally posted in LPCWare by Ex-Zero on Mon Sep 24 02:33:17 MST 2012
And what's wrong with 'Fig 35. Standard I/O pin configuration with analog input' Page 70 of http://www.nxp.com/documents/data_sheet/LPC1769_68_67_66_65_64_63.pdf :o

Re: gpio Schematic/logic

lpcware — Wed, 15 Jun 2016 21:25:38 GMT

Content originally posted in LPCWare by irven on Mon Sep 24 03:10:49 MST 2012
thanks a lot that is what i am looking for! :)
i had this data sheet but i was always searcing for GPIO and so IdidnÂ´t find it :(
next time i know.