<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: How to disable CRP 2 in LPCXpresso IDE</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/How-to-disable-CRP-2/m-p/585566#M26802</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by vasanth on Mon Jun 10 19:58:51 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Take a look at these NXP application notes for details about CRP levels and how it must be used. :)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;For LPC11xx/13xx:&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://http://ics.nxp.com/support/documents/microcontrollers/pdf/an10968.pdf"&gt;http://ics.nxp.com/support/documents...df/an10968.pdf&lt;/A&gt;&lt;BR /&gt;&lt;SPAN&gt;For LPC17xx:&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://http://ics.nxp.com/support/documents/microcontrollers/zip/an10851.zip"&gt;http://ics.nxp.com/support/documents...ip/an10851.zip&lt;/A&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 02:38:51 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T02:38:51Z</dc:date>
    <item>
      <title>How to disable CRP 2</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/How-to-disable-CRP-2/m-p/585564#M26800</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by masterboy on Mon Jun 10 00:39:54 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is there a way to cancel a CRP level 2? Or is it impossible? I would try to set CRP 2, but I'm afraid I have not blocked the definitive recording.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:38:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/How-to-disable-CRP-2/m-p/585564#M26800</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:38:49Z</dc:date>
    </item>
    <item>
      <title>Re: How to disable CRP 2</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/How-to-disable-CRP-2/m-p/585565#M26801</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by R2D2 on Mon Jun 10 00:55:49 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: masterboy&lt;/STRONG&gt;&lt;BR /&gt;Is there a way to cancel a CRP level 2? Or is it impossible? I would try to set CRP 2, but I'm afraid I have not blocked the definitive recording.&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What's not clear there?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;Table 568. Code Read Protection options[1]&lt;BR /&gt;CRP1 0x12345678&lt;BR /&gt;[COLOR=Red]Access to chip via the JTAG pins is disabled. This mode allows partial flash update using the following ISP commands and restrictions:[/COLOR]&lt;BR /&gt; • Write to RAM command can not access RAM below 0x10000200. This is due to use of the RAM by the ISP code, see Section 32.3.2.7.&lt;BR /&gt; • Read Memory command: disabled.&lt;BR /&gt; • Copy RAM to Flash command: cannot write to Sector 0.&lt;BR /&gt; • Go command: disabled.&lt;BR /&gt; • Erase sector(s) command: can erase any individual sector except sector 0 only, or can erase all sectors at once.&lt;BR /&gt; • Compare command: disabled &lt;BR /&gt;&lt;BR /&gt;This mode is useful when CRP is required and flash field updates are needed but all sectors can not be erased. The compare command is disabled, so in the case of partial flash updates the secondary loader should implement a checksum mechanism to verify the integrity of the flash.&lt;BR /&gt;&lt;BR /&gt;CRP2 0x87654321&lt;BR /&gt;This is similar to CRP1 with the following additions:&lt;BR /&gt; • Write to RAM command: disabled.&lt;BR /&gt; • Copy RAM to Flash: disabled.&lt;BR /&gt; • Erase command: only allows erase of all sectors. &lt;/SPAN&gt;&lt;HR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:38:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/How-to-disable-CRP-2/m-p/585565#M26801</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:38:50Z</dc:date>
    </item>
    <item>
      <title>Re: How to disable CRP 2</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/How-to-disable-CRP-2/m-p/585566#M26802</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by vasanth on Mon Jun 10 19:58:51 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Take a look at these NXP application notes for details about CRP levels and how it must be used. :)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;For LPC11xx/13xx:&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://http://ics.nxp.com/support/documents/microcontrollers/pdf/an10968.pdf"&gt;http://ics.nxp.com/support/documents...df/an10968.pdf&lt;/A&gt;&lt;BR /&gt;&lt;SPAN&gt;For LPC17xx:&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://http://ics.nxp.com/support/documents/microcontrollers/zip/an10851.zip"&gt;http://ics.nxp.com/support/documents...ip/an10851.zip&lt;/A&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:38:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/How-to-disable-CRP-2/m-p/585566#M26802</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:38:51Z</dc:date>
    </item>
  </channel>
</rss>

