<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPCXpresso IDEのトピックUART_IRQHandler</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/UART-IRQHandler/m-p/583577#M25918</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Mike45 on Fri Oct 29 07:23:05 MST 2010&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am wondering why there is a conditional clause to check for LSR_RDR, while the brace was entered because of an error?&amp;nbsp; Notice the bolded condition below:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;&amp;nbsp; uint8_t IIRValue, LSRValue;
&amp;nbsp; uint8_t Dummy = Dummy;

&amp;nbsp; IIRValue = LPC_UART-&amp;gt;IIR;
&amp;nbsp;&amp;nbsp;&amp;nbsp; 
&amp;nbsp; IIRValue &amp;gt;&amp;gt;= 1;/* skip pending bit in IIR */
&amp;nbsp; IIRValue &amp;amp;= 0x07;/* check bit 1~3, interrupt identification */
&amp;nbsp; if (IIRValue == IIR_RLS)/* Receive Line Status */
&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp; LSRValue = LPC_UART-&amp;gt;LSR;
&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Receive Line Status */
&amp;nbsp;&amp;nbsp;&amp;nbsp; if (LSRValue &amp;amp; (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* There are errors or break interrupt */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Read LSR will clear the interrupt */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTStatus = LSRValue;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Dummy = LPC_UART-&amp;gt;RBR;/* Dummy read on RX to clear 
interrupt, then bail out */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return;
&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp; [B] if (LSRValue &amp;amp; LSR_RDR)/* Receive Data Ready */
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* If no error on RLS, normal ready, save into the data buffer. */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Note: read RBR will clear the interrupt */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTBuffer[UARTCount++] = LPC_UART-&amp;gt;RBR;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (UARTCount == BUFSIZE)
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTCount = 0;/* buffer overflow */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp;&amp;nbsp; }[/B]
&amp;nbsp; }
&amp;nbsp; else if (IIRValue == IIR_RDA)/* Receive Data Available */
&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Receive Data Available */
&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTBuffer[UARTCount++] = LPC_UART-&amp;gt;RBR;
&amp;nbsp;&amp;nbsp;&amp;nbsp; if (UARTCount == BUFSIZE)
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTCount = 0;/* buffer overflow */
&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp; }&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;IIR_RDA != LSR_RDR ?&amp;nbsp; , meaning RDA is set when the trigger level is reached.&amp;nbsp; Besides that is there something else one should know for "proper" usage / differentiation?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 01:15:55 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T01:15:55Z</dc:date>
    <item>
      <title>UART_IRQHandler</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/UART-IRQHandler/m-p/583577#M25918</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Mike45 on Fri Oct 29 07:23:05 MST 2010&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am wondering why there is a conditional clause to check for LSR_RDR, while the brace was entered because of an error?&amp;nbsp; Notice the bolded condition below:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;&amp;nbsp; uint8_t IIRValue, LSRValue;
&amp;nbsp; uint8_t Dummy = Dummy;

&amp;nbsp; IIRValue = LPC_UART-&amp;gt;IIR;
&amp;nbsp;&amp;nbsp;&amp;nbsp; 
&amp;nbsp; IIRValue &amp;gt;&amp;gt;= 1;/* skip pending bit in IIR */
&amp;nbsp; IIRValue &amp;amp;= 0x07;/* check bit 1~3, interrupt identification */
&amp;nbsp; if (IIRValue == IIR_RLS)/* Receive Line Status */
&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp; LSRValue = LPC_UART-&amp;gt;LSR;
&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Receive Line Status */
&amp;nbsp;&amp;nbsp;&amp;nbsp; if (LSRValue &amp;amp; (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* There are errors or break interrupt */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Read LSR will clear the interrupt */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTStatus = LSRValue;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Dummy = LPC_UART-&amp;gt;RBR;/* Dummy read on RX to clear 
interrupt, then bail out */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return;
&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp; [B] if (LSRValue &amp;amp; LSR_RDR)/* Receive Data Ready */
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* If no error on RLS, normal ready, save into the data buffer. */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Note: read RBR will clear the interrupt */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTBuffer[UARTCount++] = LPC_UART-&amp;gt;RBR;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (UARTCount == BUFSIZE)
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTCount = 0;/* buffer overflow */
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp;&amp;nbsp; }[/B]
&amp;nbsp; }
&amp;nbsp; else if (IIRValue == IIR_RDA)/* Receive Data Available */
&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Receive Data Available */
&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTBuffer[UARTCount++] = LPC_UART-&amp;gt;RBR;
&amp;nbsp;&amp;nbsp;&amp;nbsp; if (UARTCount == BUFSIZE)
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; UARTCount = 0;/* buffer overflow */
&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp; }&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;IIR_RDA != LSR_RDR ?&amp;nbsp; , meaning RDA is set when the trigger level is reached.&amp;nbsp; Besides that is there something else one should know for "proper" usage / differentiation?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 01:15:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/UART-IRQHandler/m-p/583577#M25918</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T01:15:55Z</dc:date>
    </item>
  </channel>
</rss>

