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    <title>LPCXpresso IDE中的主题 Run code from Ram lpc4350 Hitex eval board</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579802#M24264</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Meyer on Fri Sep 13 01:34:44 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi LpcTeam,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have problems running my code from internal Ram. I have made changes in the linker script:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;INCLUDE "lib.ld"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;INCLUDE "4350_mem_Ram.ld"&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;ENTRY(ResetISR)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;SECTIONS&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* MAIN TEXT SECTION */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;.text : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;KEEP(*(.isr_vector))&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Global Section Table */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__section_table_start = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__data_section_table = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data_RAM2));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM2)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data_RAM2));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data_RAM3));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM3)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data_RAM3));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data_RAM4));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM4)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data_RAM4));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data_RAM5));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM5)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data_RAM5));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__data_section_table_end = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__bss_section_table = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM2));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss_RAM2));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM3));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss_RAM3));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM4));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss_RAM4));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM5));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss_RAM5));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__bss_section_table_end = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__section_table_end = . ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* End of Global Section Table */&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.after_vectors*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.text*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.rodata .rodata.*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/*&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; * for exception handling/unwind - some Newlib functions (in common&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; * with C++ and STDC++) use this. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; * Use KEEP so not discarded with --gc-sections&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;.ARM.extab : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;KEEP(*(.ARM.extab* .gnu.linkonce.armextab.*))&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__exidx_start = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.ARM.exidx : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;KEEP(*(.ARM.exidx* .gnu.linkonce.armexidx.*))&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__exidx_end = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;_etext = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data_RAM2 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RAM2*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RamLoc72*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data_RAM3 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RAM3*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RamAHB32*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB32 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data_RAM4 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RAM4*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RamAHB16*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB16 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data_RAM5 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RAM5*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RamAHB_ETB16*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB_ETB16 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* MAIN DATA SECTION */&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.uninit_RESERVED : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;KEEP(*(.bss.$RESERVED*))&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_end_uninit_RESERVED = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_data = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(vtable)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_edata = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss_RAM2 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RAM2*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RamLoc72*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss_RAM3 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RAM3*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RamAHB32*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB32&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss_RAM4 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RAM4*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RamAHB16*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB16&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss_RAM5 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RAM5*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RamAHB_ETB16*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB_ETB16&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* MAIN BSS SECTION */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_bss = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(COMMON)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_ebss = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PROVIDE(end = .);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;PROVIDE(_pvHeapStart = .);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Es kann nicht im externen Sdram platziert werden, weil der Sdram vor der Nutzung initialiersiert werden soll */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PROVIDE(_vStackTop = __top_RamLoc72 - 0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;On the debug command I load the code into ram. The code runs but no interrupts. The Isr Vector table must be overwritten by bootloader? &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Please help me&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Thx&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 02:33:07 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T02:33:07Z</dc:date>
    <item>
      <title>Run code from Ram lpc4350 Hitex eval board</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579802#M24264</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Meyer on Fri Sep 13 01:34:44 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi LpcTeam,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have problems running my code from internal Ram. I have made changes in the linker script:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;INCLUDE "lib.ld"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;INCLUDE "4350_mem_Ram.ld"&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;ENTRY(ResetISR)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;SECTIONS&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* MAIN TEXT SECTION */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;.text : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;KEEP(*(.isr_vector))&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Global Section Table */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__section_table_start = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__data_section_table = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data_RAM2));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM2)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data_RAM2));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data_RAM3));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM3)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data_RAM3));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data_RAM4));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM4)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data_RAM4));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(LOADADDR(.data_RAM5));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM5)) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.data_RAM5));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__data_section_table_end = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__bss_section_table = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM2));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss_RAM2));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM3));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss_RAM3));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM4));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss_RAM4));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM5));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LONG(&amp;nbsp; SIZEOF(.bss_RAM5));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__bss_section_table_end = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__section_table_end = . ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* End of Global Section Table */&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.after_vectors*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.text*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.rodata .rodata.*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/*&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; * for exception handling/unwind - some Newlib functions (in common&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; * with C++ and STDC++) use this. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; * Use KEEP so not discarded with --gc-sections&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;.ARM.extab : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;KEEP(*(.ARM.extab* .gnu.linkonce.armextab.*))&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__exidx_start = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.ARM.exidx : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;KEEP(*(.ARM.exidx* .gnu.linkonce.armexidx.*))&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__exidx_end = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;_etext = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data_RAM2 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RAM2*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RamLoc72*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data_RAM3 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RAM3*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RamAHB32*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB32 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data_RAM4 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RAM4*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RamAHB16*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB16 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data_RAM5 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RAM5*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data.$RamAHB_ETB16*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB_ETB16 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* MAIN DATA SECTION */&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.uninit_RESERVED : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;KEEP(*(.bss.$RESERVED*))&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_end_uninit_RESERVED = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.data : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;FILL(0xff)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_data = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(vtable)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.data*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_edata = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72 AT&amp;gt;RamLoc128&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss_RAM2 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RAM2*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RamLoc72*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss_RAM3 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RAM3*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RamAHB32*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB32&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss_RAM4 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RAM4*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RamAHB16*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB16&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss_RAM5 : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RAM5*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss.$RamAHB_ETB16*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamAHB_ETB16&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* MAIN BSS SECTION */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;.bss : ALIGN(4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_bss = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(.bss*)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;*(COMMON)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;. = ALIGN(4) ;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;_ebss = .;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PROVIDE(end = .);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;} &amp;gt; RamLoc72&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;PROVIDE(_pvHeapStart = .);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Es kann nicht im externen Sdram platziert werden, weil der Sdram vor der Nutzung initialiersiert werden soll */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PROVIDE(_vStackTop = __top_RamLoc72 - 0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;On the debug command I load the code into ram. The code runs but no interrupts. The Isr Vector table must be overwritten by bootloader? &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Please help me&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Thx&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:33:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579802#M24264</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:33:07Z</dc:date>
    </item>
    <item>
      <title>Re: Run code from Ram lpc4350 Hitex eval board</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579803#M24265</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lpcxpresso-support on Sat Sep 14 05:54:28 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Does your code actually map the vector table into RAM? And have you looked at the examples for the Hitex board supplied in LPCXpresso? IIRC some of these are built to run from RAM. There should be no need to modify linker scripts by hand to cope with running from RAM.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;And at a general level, I assume that you have read the LPC43 related LPCXpresso FAQs, starting off with...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fsupport.code-red-tech.com%2FCodeRedWiki%2FLPC1850_4350_Support" rel="nofollow" target="_blank"&gt;http://support.code-red-tech.com/CodeRedWiki/LPC1850_4350_Support&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If you need more assistance, I suggest that you provide more precise details of what you are doing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LPCXpresso Support&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:33:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579803#M24265</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:33:08Z</dc:date>
    </item>
    <item>
      <title>Re: Run code from Ram lpc4350 Hitex eval board</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579804#M24266</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Meyer on Mon Sep 16 02:59:58 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Lpcxpresso-Support,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Although I do not know where the error was, but it works for internal Ram. But if i want to use the external Sdram i got an error. I Guess it is cause the sdram isn´t initialized. Is there a script which init the emc for the sdram? Is there a way to write my own script ? As with Seggers J link? Another possibility would be to execute the code from the flash. I init the emc for the sdram and after that I copy the code from Flash to Sdram. Do I have the option to read/write from flash during code execution? &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:33:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579804#M24266</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:33:09Z</dc:date>
    </item>
    <item>
      <title>Re: Run code from Ram lpc4350 Hitex eval board</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579805#M24267</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bavarian on Mon Sep 30 06:08:04 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;It is possible to execute a script in LPCXpresso, this script then needs to init the SDRAM before the code (that has been linked to the SDRAM) is loaded.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;Look here:&amp;nbsp; &lt;/SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fcontent%2Fforum%2Fhow-to-debug-code-in-external-sdramlpc1776" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/content/forum/how-to-debug-code-in-external-sdramlpc1776&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The SDRAM init code as µVision script for the Hitex board is attached, I don't have one for LPCXpresso yet.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;A relocation of the code from flash to SDRAM is of course also possible. The code to be relocated needs to be linked to SDRAM, please don't forget the reset vector relocation&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;As soon as you have the code in SDRAM and execute from there, you can do with the external flash whatever you like.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NXP Support.&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:33:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Run-code-from-Ram-lpc4350-Hitex-eval-board/m-p/579805#M24267</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:33:09Z</dc:date>
    </item>
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