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    <title>LPCXpresso IDE中的主题 Re: 1768 FreeRTOS xHeep __BSS(RAM) problems</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574458#M21859</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by FlySnake on Sat Jun 16 11:48:17 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for reply!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__BSS(RAM2) is exactly AHB RAM. This is macro provident by CodeRed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;This RAM region is not used by peripherals. This is just another free RAM region. It is defined in space 0x2007C000 - 0x20083FFF. But peripherals starts at 0x2009C000. &lt;/SPAN&gt;&lt;A href="http://"&gt;http://www.nxp.com/documents/user_manual/UM10360.pdf&lt;/A&gt;&lt;SPAN&gt; page 12 "Memory map"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Probably I found the problem: alignment. I had configMINIMAL_STACK_SIZE 56. When I've changed it to 64 the program started to work.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 02:33:16 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T02:33:16Z</dc:date>
    <item>
      <title>1768 FreeRTOS xHeep __BSS(RAM) problems</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574456#M21857</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by FlySnake on Wed Jun 13 02:33:24 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello everyone&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Please help me figure out what's going wrong&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;heap2.c&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;static union xRTOS_HEAP
{
#if portBYTE_ALIGNMENT == 8
volatile portDOUBLE dDummy;
#else
volatile unsigned long ulDummy;
#endif
unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];
} xHeap __BSS(RAM2);&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt;But if I do this I get HardFaults after starting scheduler. It could be either IMPRECISERR (CFSR = 0x400) or INVSTATE (CFSR = 0x20000). Interestingly that if I walk through the code step by step with debugger it may work OK or falls in these faults on random instructions. Then I added task which just prints "hello" to uart and goes to vTaskDelay for a 1 second, and all other tasks (this problem occured in real project) are disabled. It always fails in this vTaskDelay.&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;#define configTOTAL_HEAP_SIZE( ( size_t ) ( 20 * 1024 ) )&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt;It works OK when xHeep placed in RamLoc32.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It also works if I place another big static array in RamAHB32.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In map file I see those static arrays starting at 0x2007C000 address - correct address of RamAHB32. But FreeRTOS's heap wouldn't work in this section.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Linker scripts&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;MEMORY
{
&amp;nbsp; /* Define each memory region */
&amp;nbsp; MFlash512 (rx) : ORIGIN = 0x4000, LENGTH = 0x3c000 /* 240k */
&amp;nbsp; RamLoc32 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000 /* 32k */
&amp;nbsp; RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32k */

}
&amp;nbsp; /* Define a symbol for the top of each memory region */
&amp;nbsp; __top_MFlash512 = 0x4000 + 0x3c000;
&amp;nbsp; __top_RamLoc32 = 0x10000000 + 0x8000;
&amp;nbsp; __top_RamAHB32 = 0x2007c000 + 0x8000;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt;MFlash512 starts at 0x4000 because of bootloader, but without it (starting at 0x0000) all symptoms are the same.&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;ENTRY(ResetISR)

SECTIONS
{

/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
KEEP(*(.isr_vector))

/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data)) ;
LONG(&amp;nbsp; SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.data_RAM2)) ;
LONG(&amp;nbsp; SIZEOF(.data_RAM2));
__data_section_table_end = .;
__bss_section_table = .;
LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss));
LONG(&amp;nbsp; SIZEOF(.bss));
LONG(&amp;nbsp;&amp;nbsp;&amp;nbsp; ADDR(.bss_RAM2));
LONG(&amp;nbsp; SIZEOF(.bss_RAM2));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */


*(.after_vectors*)

*(.text*)
*(.rodata .rodata.*)
. = ALIGN(4);

} &amp;gt; MFlash512

/*
 * for exception handling/unwind - some Newlib functions (in common
 * with C++ and STDC++) use this.
 */
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} &amp;gt; MFlash512
__exidx_start = .;

.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} &amp;gt; MFlash512
__exidx_end = .;

_etext = .;


.data_RAM2 : ALIGN(4)
{
&amp;nbsp;&amp;nbsp; FILL(0xff)
*(.data.$RAM2*)
*(.data.$RamAHB32*)
&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;
} &amp;gt; RamAHB32 AT&amp;gt;MFlash512

/* MAIN DATA SECTION */

.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
} &amp;gt; RamLoc32

.data : ALIGN(4)
{
FILL(0xff)
_data = .;
*(vtable)
*(.data*)
. = ALIGN(4) ;
_edata = .;
} &amp;gt; RamLoc32 AT&amp;gt;MFlash512


.bss_RAM2 : ALIGN(4)
{
*(.bss.$RAM2*)
*(.bss.$RamAHB32*)
&amp;nbsp;&amp;nbsp; . = ALIGN(4) ;
} &amp;gt; RamAHB32

/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} &amp;gt; RamLoc32

PROVIDE(_pvHeapStart = .);
PROVIDE(_vStackTop = __top_RamLoc32 - 0);
}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:33:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574456#M21857</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:33:15Z</dc:date>
    </item>
    <item>
      <title>Re: 1768 FreeRTOS xHeep __BSS(RAM) problems</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574457#M21858</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by&amp;nbsp; on Thu Jun 14 02:24:04 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am familiar with the code, so know the change you have made, I doubt anybody else looking at this will be able to provide an answer as you have not actually said what you changed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;From the look of it, you are attempting to put the xHeap block into __BSS(RAM2) which is in AHB RAM.&amp;nbsp; I'm not sure about the syntax [I would normally use __attribute__section((""))], but assuming the syntax is correct,&amp;nbsp; so I think the question is why can the stacks not be in AHB RAM?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;That RAM by convention is used by peripherals (USB, Ethernet).&amp;nbsp; Do you have anything enabled that might be overwriting that RAM?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;You can adapt heap_x.c to define a pointer to the start of AHB RAM, rather than defining an array of fixed size.&amp;nbsp; I'm pretty sure I have done that before without a problem, but can't be sure.&amp;nbsp; I know I have done a similar thing with Ethernet buffers which are accessed both by the DMA and C functions.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:33:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574457#M21858</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:33:15Z</dc:date>
    </item>
    <item>
      <title>Re: 1768 FreeRTOS xHeep __BSS(RAM) problems</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574458#M21859</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by FlySnake on Sat Jun 16 11:48:17 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for reply!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__BSS(RAM2) is exactly AHB RAM. This is macro provident by CodeRed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;This RAM region is not used by peripherals. This is just another free RAM region. It is defined in space 0x2007C000 - 0x20083FFF. But peripherals starts at 0x2009C000. &lt;/SPAN&gt;&lt;A href="http://"&gt;http://www.nxp.com/documents/user_manual/UM10360.pdf&lt;/A&gt;&lt;SPAN&gt; page 12 "Memory map"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Probably I found the problem: alignment. I had configMINIMAL_STACK_SIZE 56. When I've changed it to 64 the program started to work.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:33:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574458#M21859</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:33:16Z</dc:date>
    </item>
    <item>
      <title>Re: 1768 FreeRTOS xHeep __BSS(RAM) problems</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574459#M21860</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by&amp;nbsp; on Sat Jun 16 11:53:08 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Glad you got it working.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;[I think maybe you misunderstood my suggestion that peripherals were using the RAM.&amp;nbsp; I didn't mean the peripherals were mapped to that area, but Ethernet and USB buffers controlled by DMA would normally use that RAM]&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:33:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/1768-FreeRTOS-xHeep-BSS-RAM-problems/m-p/574459#M21860</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:33:17Z</dc:date>
    </item>
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