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    <title>topic Re: LPC 1227 - i can set interrupt priority? in LPCXpresso IDE</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/LPC-1227-i-can-set-interrupt-priority/m-p/572659#M21097</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Ex-Zero on Mon May 07 04:24:42 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;UM10441 describes a CMSIS (and CM[B][COLOR=Red]I[/COLOR][/B]SIS&amp;nbsp; :)) function to set 4 priority levels:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;Table 377. CM[COLOR=Red][B]I[/B][/COLOR]SIS access NVIC functions&lt;BR /&gt;void [B][COLOR=Red]NVIC_SetPriority[/COLOR][/B](IRQn_Type IRQn, uint32_t priority)&lt;BR /&gt;&lt;BR /&gt;25.5.2 Nested Vectored Interrupt Controller&lt;BR /&gt;This section describes the Nested Vectored Interrupt Controller (NVIC) and the&lt;BR /&gt;registers it uses. The NVIC supports:&lt;BR /&gt;• 32 interrupts.&lt;BR /&gt;• [B][COLOR=Red]A programmable priority level of 0-3 for each interrupt. A higher level corresponds to a lower priority, so level 0 is the highest interrupt priority.[/COLOR][/B]&lt;BR /&gt;• Level and pulse detection of interrupt signals.&lt;BR /&gt;• Interrupt tail-chaining.&lt;BR /&gt;• An external Non-maskable interrupt (NMI).&lt;BR /&gt;&lt;/SPAN&gt;&lt;HR /&gt;&lt;SPAN&gt;So what's not clear there :confused:&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 01:08:15 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T01:08:15Z</dc:date>
    <item>
      <title>LPC 1227 - i can set interrupt priority?</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/LPC-1227-i-can-set-interrupt-priority/m-p/572658#M21096</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lsbach_plum on Mon May 07 02:25:06 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hey,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is it possible to set priorities for interrupts?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; I support two interrupts: GPIO, and Timer. I want that when you capture GPIO interrupt timer interrupt is finished. Is there a registry responsible for the priorities?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 01:08:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/LPC-1227-i-can-set-interrupt-priority/m-p/572658#M21096</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T01:08:14Z</dc:date>
    </item>
    <item>
      <title>Re: LPC 1227 - i can set interrupt priority?</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/LPC-1227-i-can-set-interrupt-priority/m-p/572659#M21097</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Ex-Zero on Mon May 07 04:24:42 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;UM10441 describes a CMSIS (and CM[B][COLOR=Red]I[/COLOR][/B]SIS&amp;nbsp; :)) function to set 4 priority levels:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;Table 377. CM[COLOR=Red][B]I[/B][/COLOR]SIS access NVIC functions&lt;BR /&gt;void [B][COLOR=Red]NVIC_SetPriority[/COLOR][/B](IRQn_Type IRQn, uint32_t priority)&lt;BR /&gt;&lt;BR /&gt;25.5.2 Nested Vectored Interrupt Controller&lt;BR /&gt;This section describes the Nested Vectored Interrupt Controller (NVIC) and the&lt;BR /&gt;registers it uses. The NVIC supports:&lt;BR /&gt;• 32 interrupts.&lt;BR /&gt;• [B][COLOR=Red]A programmable priority level of 0-3 for each interrupt. A higher level corresponds to a lower priority, so level 0 is the highest interrupt priority.[/COLOR][/B]&lt;BR /&gt;• Level and pulse detection of interrupt signals.&lt;BR /&gt;• Interrupt tail-chaining.&lt;BR /&gt;• An external Non-maskable interrupt (NMI).&lt;BR /&gt;&lt;/SPAN&gt;&lt;HR /&gt;&lt;SPAN&gt;So what's not clear there :confused:&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 01:08:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/LPC-1227-i-can-set-interrupt-priority/m-p/572659#M21097</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T01:08:15Z</dc:date>
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