SPI failure to launch

lpcware — Wed, 15 Jun 2016 22:31:23 GMT

Content originally posted in LPCWare by woodchuck on Wed Apr 06 12:28:14 MST 2011
Would anyone know why the following sequence of instructions fails to get any activity out of the SSP of the LPC1114? I've jumped through all the hoops I can think of. Surely vectored interrupts aren't required to output a byte via SPI?!

[PHP]
LPC_SYSCON->PRESETCTRL |= 1;         // SSP0_RST_N set to 1

LPC_SYSCON->SYSAHBCLKCTRL |= (1<<11);   // enable SPI0 clock

LPC_SYSCON->SSP0CLKDIV = 0x01;

LPC_IOCON->PIO0_8 &= ~0x07;
LPC_IOCON->PIO0_8 |= 1;                     // config MISO

LPC_IOCON->PIO0_9 &= ~0x07;
LPC_IOCON->PIO0_9 |= 1;                          // config MOSI

LPC_IOCON->SCK_LOC = 0x01;               // select SCK
LPC_IOCON->PIO2_11 = 0x01;                   // as p2.11

LPC_IOCON->PIO0_2 &= ~0x07;               // Use SSP
LPC_IOCON->PIO0_2 |= 0x01;                   // SSEL

LPC_SSP0->CR0 = 0xEF07;              // 8-bit, SPI, CPOL0, CPHA0, 100 KHz

LPC_SSP0->CPSR = 0x2;                  // this is the minumum divisor

LPC_SSP0->CR1 = 4;                        // select master mode

LPC_SSP0->CR1 |= 2;                       // enable SPI

LPC_SSP0->DR = 0x1234;                // write something to tx fifo
[/PHP]

Re: SPI failure to launch

lpcware — Wed, 15 Jun 2016 22:31:24 GMT

Content originally posted in LPCWare by Ex-Zero on Wed Apr 06 13:11:36 MST 2011

Quote:

LPC_SSP0->CR1 = 4; // select master mode

That's wrong :):)

This bit selects slave mode, so it's waiting for a master....

Re: SPI failure to launch

lpcware — Wed, 15 Jun 2016 22:31:25 GMT

Content originally posted in LPCWare by woodchuck on Wed Apr 06 13:36:06 MST 2011
Right location, wrong state. Thank you very much for catching this!!!

Edit: Program works beautifully. :)

topic SPI failure to launch in LPCXpresso IDE

SPI failure to launch

Re: SPI failure to launch

Re: SPI failure to launch