LPCXpresso IDEのトピックRe: Spi scr

Spi scr

lpcware — Thu, 16 Jun 2016 00:16:43 GMT

Content originally posted in LPCWare by VCAV on Thu May 17 12:07:10 MST 2012
Hi,

Could someone help me how to choose the SCR in the SSP initialization?

In the example it was selected 15...

/* Set DSS data to 8-bit, Frame format SPI, CPOL = 0, CPHA = 0, and SCR is 15 */
LPC_SSP0->CR0 = 0x0707;

could someone tell my why?:confused:

thanks

Re: Spi scr

lpcware — Thu, 16 Jun 2016 00:16:44 GMT

Content originally posted in LPCWare by Ex-Zero on Thu May 17 12:25:06 MST 2012
Don't know which mcu you are using, but a lot of manuals are describing SCR:

Quote:

15:8 SCR Serial Clock Rate. The number of prescaler-output clocks per bit on the bus, minus one. Given that CPSDVSR is the prescale divider, and the APB clock PCLK clocks the prescaler, the bit frequency is PCLK / (CPSDVSR x [SCR+1]).

So your SCR isn't 15 :)

Re: Spi scr

lpcware — Thu, 16 Jun 2016 00:16:45 GMT

Content originally posted in LPCWare by frame on Fri May 18 01:56:32 MST 2012
I suggest to get some (working) example code, and dissect it with the help of the reference manual. Even better when the example code includes comments... ;-)

That's the way I do it often.

Re: Spi scr

lpcware — Thu, 16 Jun 2016 00:16:45 GMT

Content originally posted in LPCWare by VCAV on Fri May 18 07:08:22 MST 2012
Hi My mistake, I forgot the MCU :o
Is the LPC1114

Quote:
So your SCR isn't 15

This is the NXPs code example, and thats why I got confused

07 should be 7 the SCR, and is commented 15...

Anyway I could not find the SPI0_PCKL in the code example, to discover the SPI clock...
Any suggestion?

Re: Spi scr

lpcware — Thu, 16 Jun 2016 00:16:46 GMT

Content originally posted in LPCWare by Ex-Zero on Fri May 18 07:42:30 MST 2012
If you haven't changed SPI0 clock divider register (SSP0CLKDIV) it's still 0 (reset value) :rolleyes:
Then your SPI0_PCLK is main clock / (0+1) = main clock :eek:

Sample:

 LPC_SSP0->CPSR = 0x2;        //clock prescaler, use even, minimum is 2
 LPC_SSP0->CR0 = 0x0107;    //SCR =1, 8bit

With:

SSP frequency = PCLK / (CPSDVSR x [SCR+1]) = 48MHz / (2*2) = 12MHz

And, surprise, Scope shows 12MHz

Re: Spi scr

lpcware — Thu, 16 Jun 2016 00:16:47 GMT

Content originally posted in LPCWare by Pellek on Tue May 22 00:41:35 MST 2012
[LEFT]I got a question about this same register :

i'm using LPC11U14 as a slave, and receive the clock from an other IC. Does it change anything to use this register ?
[/LEFT]

Re: Spi scr

lpcware — Thu, 16 Jun 2016 00:16:47 GMT

Content originally posted in LPCWare by Ex-Zero on Tue May 22 00:59:00 MST 2012

Quote: Pellek
Does it change anything to use this register ?

No, as mentioned above this register is using your main clock as source. Which clock source you use for main clock is your decision :)

Re: Spi scr

lpcware — Thu, 16 Jun 2016 00:16:48 GMT

Content originally posted in LPCWare by Pellek on Tue May 22 01:12:27 MST 2012
I wasn't clear,

my 11U14 is a slave in the SPI communication but has its own clock for all other operations.

So there is main clock, and there is a clock on sclk1.

If i m right, this register would prescale the clock if it were main clock, but has no interference if µC is a slave. got it ?

Re: Spi scr

lpcware — Thu, 16 Jun 2016 00:16:49 GMT

Content originally posted in LPCWare by Ex-Zero on Tue May 22 01:39:20 MST 2012
So we are talking about SCK :)

As slave SCR isn't used because a slave is receiving SCK from master.
So changing SCR has no effect for slaves.