LPCXpresso IDEのトピックRe: How to use external pin interrupts

How to use external pin interrupts

lpcware — Wed, 15 Jun 2016 23:47:19 GMT

Content originally posted in LPCWare by emielzij on Sun Jan 25 11:57:45 MST 2015
I want to trigger an ISR if an external pin changes state.

This is my code at the moment:

#include "lpc11xx.h"

int main(void)
{
LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 16);//Enable iocon clock

LPC_IOCON->PIO0_1&= 0xFFFFFFF8;//PIO0_1 as standard GPIO

LPC_GPIO0->DIR &= ~(1 << 1);//PIO0_1 as input

LPC_GPIO0->IS &= ~(1 << 1);//PIO0_1 as edge sensitive

LPC_GPIO0->IBE |= (1 << 1);//Both edges trigger an interrupt

LPC_GPIO0->IE|= (1 << 1);//Not mask the interrupt of this pin anymore


NVIC_EnableIRQ(EINT0_IRQn);

    while(1)
    {

    }
    return 0 ;
}


void EINT0_IRQHandler(void)
{
//Check which pin triggered an interrupt
        //Some code
        //Clear interrupt flag
}

I know that some statements are redundant.

How can I check which pin is interrupted in the isr, is this the GPIOnRIS register?
And in which register do I need to clear the interrupt at the end of my ISR?

Regards

Re: How to use external pin interrupts

lpcware — Wed, 15 Jun 2016 23:47:19 GMT

Content originally posted in LPCWare by R2D2 on Sun Jan 25 22:36:14 MST 2015
What about LPCOpen sample :quest:

Something like: nxp_lpcxpresso_11c24_periph_pinint

Re: How to use external pin interrupts

lpcware — Wed, 15 Jun 2016 23:47:20 GMT

Content originally posted in LPCWare by emielzij on Mon Jan 26 04:18:16 MST 2015
I took a look at the example. But I don't understand what is going on. I really prefer programing the registers directly. But I can't figure out which register I should use to check which pin caused an interrupt and how to clear the interrupt at the end of the ISR. Hope someone can help me with this problem.

I am using the LPC11C24

edit: I think that the GPIOnMIS register should be checked to figure out which pin caused the interrupt. Would be nice if someone could confirm this.

Re: How to use external pin interrupts

lpcware — Wed, 15 Jun 2016 23:47:21 GMT

Content originally posted in LPCWare by R2D2 on Mon Jan 26 04:45:28 MST 2015

Quote: emielzij
edit: I think that the GPIOnMIS register should be checked to figure out which pin caused the interrupt. Would be nice if someone could confirm this.

So you are using masked interrupts? Otherwise I would recommend to read RAW interrupt status register

CMSISv2p00 Sample:

#include "LPC11xx.h"

volatile uint32_t counter=0;

#define INT_PIN(1<<0)//select pin of GPIO1

void PIN_init(void)
{
//Set ext interrupt
 LPC_IOCON->R_PIO1_0 |= 0x01;   //select GPIO
 LPC_GPIO1->DIR &=~INT_PIN;//input
 LPC_GPIO1->IS  &=~INT_PIN;//0: edge sensitive
 LPC_GPIO1->IBE &=~INT_PIN;//0: trigger on IEV
 LPC_GPIO1->IEV &=~INT_PIN;//0: trigger low interrupt
 LPC_GPIO1->IE  |= INT_PIN;//1: enable interrupt
 NVIC_EnableIRQ(EINT1_IRQn);
}

//PIO1 interrupt handler
void PIOINT1_IRQHandler(void)      // PIOINT1
{
 if(LPC_GPIO1->RIS & INT_PIN)//read raw interrupt status
 {
  counter ++;
  LPC_GPIO1->IC |= INT_PIN;__NOP();__NOP();//clear edge detection
 }
}

int main(void)
{
 volatile static int i = 0;
 PIN_init();
 while(1)
 {
  i++ ;
 }
 return 0 ;
}