<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Problem with ADC interrupt for DMA in LPCXpresso IDE</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/Problem-with-ADC-interrupt-for-DMA/m-p/530088#M1797</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by klaschudi on Fri Jun 28 06:29:17 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello together,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm working with a LPC17569 and try to store the data read by the ADC into an uint32_t array with DMA.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;If I understand it right, the ADC module should throw an interrupt which lets the DMA module start transfering the data.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Unfortunately in my implementation the DMA Controller starts the transfer before the ADC finished reading all channels. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Does someone find the faults in my Code?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
void ADC_init()
{
 LPC_SC-&amp;gt;PCONP |= (1 &amp;lt;&amp;lt; PCADC);&amp;nbsp;&amp;nbsp; // enable power for ADC-unit
 int i;
 for (i = 0; i &amp;lt; ADC_NUM; i++)
 {
&amp;nbsp; ADCValue&lt;I&gt; = 0;
 }
 // configure ADC-Pins
 LPC_PINCON-&amp;gt;PINSEL0 |= ((2 &amp;lt;&amp;lt; 4)|(2 &amp;lt;&amp;lt; 6));&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // AD0.7/P0.2|AD0.6/P0.3
 LPC_PINCON-&amp;gt;PINSEL1 |= ((1 &amp;lt;&amp;lt; 14)|(1 &amp;lt;&amp;lt; 16)|(1 &amp;lt;&amp;lt; 18)|(1 &amp;lt;&amp;lt; 20));&amp;nbsp; // AD0.0/P0.23|AD0.1/P0.24|AD0.2/P0.25|AD0.3/P0.26
 LPC_PINCON-&amp;gt;PINSEL3 |= ((3 &amp;lt;&amp;lt; 28)|(3 &amp;lt;&amp;lt; 30));&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // AD0.4/P1.30|AD0.5/P1.31
 // configure Pinmodes (no pull up or pull down)
 LPC_PINCON-&amp;gt;PINMODE0 |= ((pinmode_nothing &amp;lt;&amp;lt;&amp;nbsp; 4)|(pinmode_nothing &amp;lt;&amp;lt; 6));
 LPC_PINCON-&amp;gt;PINMODE1 |= ((pinmode_nothing &amp;lt;&amp;lt; 14)|(pinmode_nothing &amp;lt;&amp;lt; 16)|(pinmode_nothing &amp;lt;&amp;lt; 18)|(pinmode_nothing &amp;lt;&amp;lt; 20));
 LPC_PINCON-&amp;gt;PINMODE3 |= ((pinmode_nothing &amp;lt;&amp;lt; 28)|(pinmode_nothing &amp;lt;&amp;lt; 30));
 // clock settings (set to 10MHz)
 LPC_SC-&amp;gt;PCLKSEL0 &amp;amp;= ~(3 &amp;lt;&amp;lt; PCLK_ADC);&amp;nbsp;&amp;nbsp; // reset clk bits
 LPC_SC-&amp;gt;PCLKSEL0 |= (clk_div_4 &amp;lt;&amp;lt; PCLK_ADC); // set ADC_CLK to 30MHz
 LPC_ADC-&amp;gt;ADCR |=&amp;nbsp; (0xFF &amp;lt;&amp;lt; ADC_SEL)|&amp;nbsp;&amp;nbsp; // all channels are selected
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x2 &amp;lt;&amp;lt; ADC_CLKDIV)|&amp;nbsp; // divide by 2+1 -&amp;gt; ADC_CLK = 10MHz
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x0 &amp;lt;&amp;lt; ADC_BURST)|&amp;nbsp;&amp;nbsp; // Burst-Mode -&amp;gt; all channels are consequently read
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; ADC_PDN);&amp;nbsp;&amp;nbsp; // enable ADC
 // Interrupts
 LPC_ADC-&amp;gt;ADINTEN &amp;amp;= ~0x1FF;
 LPC_ADC-&amp;gt;ADINTEN |= (1 &amp;lt;&amp;lt; 8);&amp;nbsp; // enable Interrupts for all channels
 while (! (LPC_ADC-&amp;gt;ADINTEN &amp;amp; (1 &amp;lt;&amp;lt; 8)));
 //NVIC_EnableIRQ(ADC_IRQn);&amp;nbsp; // enable ADC-Interrupt
}
 
 
void ADC_startBurstRead(void)
{
 if (LPC_ADC-&amp;gt;ADCR &amp;amp; 0x7) // clear start bits if not already cleared
 {
&amp;nbsp; LPC_ADC-&amp;gt;ADCR &amp;amp;= ~(0x7 &amp;lt;&amp;lt; ADC_START);
 }
 LPC_ADC-&amp;gt;ADCR &amp;amp;= ~(0xFF &amp;lt;&amp;lt; ADC_SEL);// reset sel bits
 LPC_ADC-&amp;gt;ADCR |= (0xFF &amp;lt;&amp;lt; ADC_SEL); // read all channels
 LPC_ADC-&amp;gt;ADCR |= (1 &amp;lt;&amp;lt; ADC_BURST);&amp;nbsp; // start burst read
}
 
void DMA_init(uint32_t src_adr, uint32_t dst_adr)
{
 dmaReady = false;
 DMATCCount = 0;
 DMAErrCount = 0;
 NVIC_DisableIRQ(ADC_IRQn);&amp;nbsp;&amp;nbsp; // ADC Interrupt needed but no NVIC
 // DMA Controller Initialization --------------------------------------
 LPC_SC-&amp;gt;PCONP |= (1 &amp;lt;&amp;lt; PCGPDMA);&amp;nbsp; // enable power for DMA-unit
 LPC_GPDMA-&amp;gt;DMACSync = 0xFFFF;&amp;nbsp;&amp;nbsp; // enable sync (default)
 LPC_SC-&amp;gt;DMAREQSEL = 0x0000;&amp;nbsp;&amp;nbsp; // select UART for DMA Request ???
 LPC_GPDMA-&amp;gt;DMACIntTCClear = 0x01;
 LPC_GPDMA-&amp;gt;DMACIntErrClr= 0x01;
 LPC_GPDMA-&amp;gt;DMACConfig = (1 &amp;lt;&amp;lt; DMA_E); // enable DMA
 while (! (LPC_GPDMA-&amp;gt;DMACConfig &amp;amp; 0x01));
 NVIC_EnableIRQ(DMA_IRQn);
 // Channel 0 Initialization -------------------------------------------
 LPC_GPDMA-&amp;gt;DMACIntTCClear = 0x01;
 LPC_GPDMA-&amp;gt;DMACIntErrClr= 0x01;
 LPC_GPDMACH0-&amp;gt;DMACCConfig = 0;
 LPC_GPDMACH0-&amp;gt;DMACCControl = 0;
 // Ch0 set for P2M transfer from ADC to mempry.
 LPC_GPDMACH0-&amp;gt;DMACCSrcAddr = src_adr;
 LPC_GPDMACH0-&amp;gt;DMACCDestAddr = dst_adr;
 LPC_GPDMACH0-&amp;gt;DMACCControl = (((DMA_SIZE &amp;amp; 0x0FFF) &amp;lt;&amp;lt; DMA_TransferSize)|
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x0 &amp;lt;&amp;lt; DMA_SBSize)|&amp;nbsp;&amp;nbsp; // src burst size = 1
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x0 &amp;lt;&amp;lt; DMA_DBSize)|&amp;nbsp;&amp;nbsp; // dst burst size = 1
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x2 &amp;lt;&amp;lt; DMA_SWidth)|&amp;nbsp;&amp;nbsp; // word (32bit) transfer
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x2 &amp;lt;&amp;lt; DMA_DWidth)|
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_SI)|
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_DI)|
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_I)
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; );
 return;
}
void DMA_enableCH0(void)
{
 LPC_GPDMACH0-&amp;gt;DMACCConfig = ((0x1 &amp;lt;&amp;lt; DMA_E)|&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // not enable yet must be done by caller
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x4 &amp;lt;&amp;lt; DMA_SrcPeripheral)| // ADC as source
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x2 &amp;lt;&amp;lt; DMA_TransferType)|&amp;nbsp; // P2M
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_IE)|&amp;nbsp;&amp;nbsp;&amp;nbsp; // mask error interrupt
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_ITC)&amp;nbsp;&amp;nbsp;&amp;nbsp; // mask terminal Counter interrupt
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; );
}
void DMA_IRQHandler(void)
{
&amp;nbsp; uint32_t regVal;
&amp;nbsp; // worked fine
&amp;nbsp; regVal = LPC_GPDMA-&amp;gt;DMACIntTCStat;
&amp;nbsp; if ( regVal )
&amp;nbsp; {
 DMATCCount++;
 LPC_GPDMA-&amp;gt;DMACIntTCClear = regVal;
 if ( regVal &amp;amp; 0x01 )
 {
&amp;nbsp;&amp;nbsp; dmaReady = true;
 }
 LPC_ADC-&amp;gt;ADCR &amp;amp;= ~(1 &amp;lt;&amp;lt; ADC_BURST);&amp;nbsp; // Disable the BURST mode bit
&amp;nbsp; }
&amp;nbsp; // error
&amp;nbsp; regVal = LPC_GPDMA-&amp;gt;DMACIntErrStat;
&amp;nbsp; if ( regVal )
&amp;nbsp; {
 DMAErrCount++;
 LPC_GPDMA-&amp;gt;DMACIntErrClr = regVal;
 LPC_ADC-&amp;gt;ADCR &amp;amp;= ~(1 &amp;lt;&amp;lt; ADC_BURST);&amp;nbsp; // Disable the BURST mode bit
&amp;nbsp; }
&amp;nbsp; return;
}
 
&lt;/I&gt;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In my main-function I first call ADC_init(), the DMA_init() then I start a burst read and end with Enabling the DMA-Channel.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks a lot for your help...&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 01:33:47 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T01:33:47Z</dc:date>
    <item>
      <title>Problem with ADC interrupt for DMA</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Problem-with-ADC-interrupt-for-DMA/m-p/530088#M1797</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by klaschudi on Fri Jun 28 06:29:17 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello together,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm working with a LPC17569 and try to store the data read by the ADC into an uint32_t array with DMA.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;If I understand it right, the ADC module should throw an interrupt which lets the DMA module start transfering the data.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Unfortunately in my implementation the DMA Controller starts the transfer before the ADC finished reading all channels. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Does someone find the faults in my Code?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
void ADC_init()
{
 LPC_SC-&amp;gt;PCONP |= (1 &amp;lt;&amp;lt; PCADC);&amp;nbsp;&amp;nbsp; // enable power for ADC-unit
 int i;
 for (i = 0; i &amp;lt; ADC_NUM; i++)
 {
&amp;nbsp; ADCValue&lt;I&gt; = 0;
 }
 // configure ADC-Pins
 LPC_PINCON-&amp;gt;PINSEL0 |= ((2 &amp;lt;&amp;lt; 4)|(2 &amp;lt;&amp;lt; 6));&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // AD0.7/P0.2|AD0.6/P0.3
 LPC_PINCON-&amp;gt;PINSEL1 |= ((1 &amp;lt;&amp;lt; 14)|(1 &amp;lt;&amp;lt; 16)|(1 &amp;lt;&amp;lt; 18)|(1 &amp;lt;&amp;lt; 20));&amp;nbsp; // AD0.0/P0.23|AD0.1/P0.24|AD0.2/P0.25|AD0.3/P0.26
 LPC_PINCON-&amp;gt;PINSEL3 |= ((3 &amp;lt;&amp;lt; 28)|(3 &amp;lt;&amp;lt; 30));&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // AD0.4/P1.30|AD0.5/P1.31
 // configure Pinmodes (no pull up or pull down)
 LPC_PINCON-&amp;gt;PINMODE0 |= ((pinmode_nothing &amp;lt;&amp;lt;&amp;nbsp; 4)|(pinmode_nothing &amp;lt;&amp;lt; 6));
 LPC_PINCON-&amp;gt;PINMODE1 |= ((pinmode_nothing &amp;lt;&amp;lt; 14)|(pinmode_nothing &amp;lt;&amp;lt; 16)|(pinmode_nothing &amp;lt;&amp;lt; 18)|(pinmode_nothing &amp;lt;&amp;lt; 20));
 LPC_PINCON-&amp;gt;PINMODE3 |= ((pinmode_nothing &amp;lt;&amp;lt; 28)|(pinmode_nothing &amp;lt;&amp;lt; 30));
 // clock settings (set to 10MHz)
 LPC_SC-&amp;gt;PCLKSEL0 &amp;amp;= ~(3 &amp;lt;&amp;lt; PCLK_ADC);&amp;nbsp;&amp;nbsp; // reset clk bits
 LPC_SC-&amp;gt;PCLKSEL0 |= (clk_div_4 &amp;lt;&amp;lt; PCLK_ADC); // set ADC_CLK to 30MHz
 LPC_ADC-&amp;gt;ADCR |=&amp;nbsp; (0xFF &amp;lt;&amp;lt; ADC_SEL)|&amp;nbsp;&amp;nbsp; // all channels are selected
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x2 &amp;lt;&amp;lt; ADC_CLKDIV)|&amp;nbsp; // divide by 2+1 -&amp;gt; ADC_CLK = 10MHz
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x0 &amp;lt;&amp;lt; ADC_BURST)|&amp;nbsp;&amp;nbsp; // Burst-Mode -&amp;gt; all channels are consequently read
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; ADC_PDN);&amp;nbsp;&amp;nbsp; // enable ADC
 // Interrupts
 LPC_ADC-&amp;gt;ADINTEN &amp;amp;= ~0x1FF;
 LPC_ADC-&amp;gt;ADINTEN |= (1 &amp;lt;&amp;lt; 8);&amp;nbsp; // enable Interrupts for all channels
 while (! (LPC_ADC-&amp;gt;ADINTEN &amp;amp; (1 &amp;lt;&amp;lt; 8)));
 //NVIC_EnableIRQ(ADC_IRQn);&amp;nbsp; // enable ADC-Interrupt
}
 
 
void ADC_startBurstRead(void)
{
 if (LPC_ADC-&amp;gt;ADCR &amp;amp; 0x7) // clear start bits if not already cleared
 {
&amp;nbsp; LPC_ADC-&amp;gt;ADCR &amp;amp;= ~(0x7 &amp;lt;&amp;lt; ADC_START);
 }
 LPC_ADC-&amp;gt;ADCR &amp;amp;= ~(0xFF &amp;lt;&amp;lt; ADC_SEL);// reset sel bits
 LPC_ADC-&amp;gt;ADCR |= (0xFF &amp;lt;&amp;lt; ADC_SEL); // read all channels
 LPC_ADC-&amp;gt;ADCR |= (1 &amp;lt;&amp;lt; ADC_BURST);&amp;nbsp; // start burst read
}
 
void DMA_init(uint32_t src_adr, uint32_t dst_adr)
{
 dmaReady = false;
 DMATCCount = 0;
 DMAErrCount = 0;
 NVIC_DisableIRQ(ADC_IRQn);&amp;nbsp;&amp;nbsp; // ADC Interrupt needed but no NVIC
 // DMA Controller Initialization --------------------------------------
 LPC_SC-&amp;gt;PCONP |= (1 &amp;lt;&amp;lt; PCGPDMA);&amp;nbsp; // enable power for DMA-unit
 LPC_GPDMA-&amp;gt;DMACSync = 0xFFFF;&amp;nbsp;&amp;nbsp; // enable sync (default)
 LPC_SC-&amp;gt;DMAREQSEL = 0x0000;&amp;nbsp;&amp;nbsp; // select UART for DMA Request ???
 LPC_GPDMA-&amp;gt;DMACIntTCClear = 0x01;
 LPC_GPDMA-&amp;gt;DMACIntErrClr= 0x01;
 LPC_GPDMA-&amp;gt;DMACConfig = (1 &amp;lt;&amp;lt; DMA_E); // enable DMA
 while (! (LPC_GPDMA-&amp;gt;DMACConfig &amp;amp; 0x01));
 NVIC_EnableIRQ(DMA_IRQn);
 // Channel 0 Initialization -------------------------------------------
 LPC_GPDMA-&amp;gt;DMACIntTCClear = 0x01;
 LPC_GPDMA-&amp;gt;DMACIntErrClr= 0x01;
 LPC_GPDMACH0-&amp;gt;DMACCConfig = 0;
 LPC_GPDMACH0-&amp;gt;DMACCControl = 0;
 // Ch0 set for P2M transfer from ADC to mempry.
 LPC_GPDMACH0-&amp;gt;DMACCSrcAddr = src_adr;
 LPC_GPDMACH0-&amp;gt;DMACCDestAddr = dst_adr;
 LPC_GPDMACH0-&amp;gt;DMACCControl = (((DMA_SIZE &amp;amp; 0x0FFF) &amp;lt;&amp;lt; DMA_TransferSize)|
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x0 &amp;lt;&amp;lt; DMA_SBSize)|&amp;nbsp;&amp;nbsp; // src burst size = 1
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x0 &amp;lt;&amp;lt; DMA_DBSize)|&amp;nbsp;&amp;nbsp; // dst burst size = 1
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x2 &amp;lt;&amp;lt; DMA_SWidth)|&amp;nbsp;&amp;nbsp; // word (32bit) transfer
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x2 &amp;lt;&amp;lt; DMA_DWidth)|
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_SI)|
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_DI)|
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_I)
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; );
 return;
}
void DMA_enableCH0(void)
{
 LPC_GPDMACH0-&amp;gt;DMACCConfig = ((0x1 &amp;lt;&amp;lt; DMA_E)|&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // not enable yet must be done by caller
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x4 &amp;lt;&amp;lt; DMA_SrcPeripheral)| // ADC as source
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x2 &amp;lt;&amp;lt; DMA_TransferType)|&amp;nbsp; // P2M
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_IE)|&amp;nbsp;&amp;nbsp;&amp;nbsp; // mask error interrupt
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1 &amp;lt;&amp;lt; DMA_ITC)&amp;nbsp;&amp;nbsp;&amp;nbsp; // mask terminal Counter interrupt
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; );
}
void DMA_IRQHandler(void)
{
&amp;nbsp; uint32_t regVal;
&amp;nbsp; // worked fine
&amp;nbsp; regVal = LPC_GPDMA-&amp;gt;DMACIntTCStat;
&amp;nbsp; if ( regVal )
&amp;nbsp; {
 DMATCCount++;
 LPC_GPDMA-&amp;gt;DMACIntTCClear = regVal;
 if ( regVal &amp;amp; 0x01 )
 {
&amp;nbsp;&amp;nbsp; dmaReady = true;
 }
 LPC_ADC-&amp;gt;ADCR &amp;amp;= ~(1 &amp;lt;&amp;lt; ADC_BURST);&amp;nbsp; // Disable the BURST mode bit
&amp;nbsp; }
&amp;nbsp; // error
&amp;nbsp; regVal = LPC_GPDMA-&amp;gt;DMACIntErrStat;
&amp;nbsp; if ( regVal )
&amp;nbsp; {
 DMAErrCount++;
 LPC_GPDMA-&amp;gt;DMACIntErrClr = regVal;
 LPC_ADC-&amp;gt;ADCR &amp;amp;= ~(1 &amp;lt;&amp;lt; ADC_BURST);&amp;nbsp; // Disable the BURST mode bit
&amp;nbsp; }
&amp;nbsp; return;
}
 
&lt;/I&gt;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In my main-function I first call ADC_init(), the DMA_init() then I start a burst read and end with Enabling the DMA-Channel.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks a lot for your help...&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 01:33:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Problem-with-ADC-interrupt-for-DMA/m-p/530088#M1797</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T01:33:47Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with ADC interrupt for DMA</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Problem-with-ADC-interrupt-for-DMA/m-p/530089#M1798</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by klaschudi on Fri Jun 28 08:08:49 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;problem solved...&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It had something to do with the Interrupt Enable Register of the ADC. I used the global DONE-Flag as interrupt source there, but it has to be only the Flag of the last Channel (ADINTEN7).&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 01:33:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Problem-with-ADC-interrupt-for-DMA/m-p/530089#M1798</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T01:33:48Z</dc:date>
    </item>
  </channel>
</rss>

