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    <title>topic Re: Rit mask register? in LPCXpresso IDE</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529612#M1579</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by NXP_USA on Tue Feb 15 17:48:36 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;All of the bits in the compare register must match the counter register, unless a corresponding bit is set in the mask register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Examples:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MASK register is 0xFFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Comparison will ALWAYS match regardless of the values of COMPVAL or COUNTER&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;MASK register is 0x00000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Comparison will only match when COMPVAL[0:31] == COUNTER[0:31]&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;MASK register is 0x0000FFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Comparison will match whenever COMPVAL[16:31] == COUNTER[16:31]&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;-NXP&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 02:55:45 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T02:55:45Z</dc:date>
    <item>
      <title>Rit mask register?</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529611#M1578</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Albert on Tue Feb 15 07:08:34 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Someone can explain how the mask register works on RIT?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I see the block diagram and I didn't unterstend, because the output bus of the comparator and the mask is 32bits, but both are conected in the OU port input.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank in advance.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:55:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529611#M1578</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:55:44Z</dc:date>
    </item>
    <item>
      <title>Re: Rit mask register?</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529612#M1579</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by NXP_USA on Tue Feb 15 17:48:36 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;All of the bits in the compare register must match the counter register, unless a corresponding bit is set in the mask register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Examples:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;MASK register is 0xFFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Comparison will ALWAYS match regardless of the values of COMPVAL or COUNTER&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;MASK register is 0x00000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Comparison will only match when COMPVAL[0:31] == COUNTER[0:31]&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;MASK register is 0x0000FFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Comparison will match whenever COMPVAL[16:31] == COUNTER[16:31]&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;-NXP&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:55:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529612#M1579</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:55:45Z</dc:date>
    </item>
    <item>
      <title>Re: Rit mask register?</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529613#M1580</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Albert on Wed Feb 16 12:22:35 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:55:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529613#M1580</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:55:45Z</dc:date>
    </item>
    <item>
      <title>Re: Rit mask register?</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529614#M1581</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by deBoogle on Thu Feb 17 14:45:45 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I do have to say that the user manual seems to confuse this issue a little, it states that a '1' in the MASK register 'forces' a compare on corresponding bits between compare and counter registers.&amp;nbsp; But in the functional descrption at the end of the chapter on RIT it states that writing a '1' removes bits from the comparison.&amp;nbsp; In my mind, 'forcing a compare' suggest that those bits marked with a 1 will be compared and not the others.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am aware its a terminology thing, but I bet i'm not the only one who was confused by this.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;deBoogle&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:55:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529614#M1581</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:55:46Z</dc:date>
    </item>
    <item>
      <title>Re: Rit mask register?</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529615#M1582</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by skysat on Thu Feb 17 22:49:20 MST 2011&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I must respectfully disagree with NXP_USA.&amp;nbsp; He has it backwards.&amp;nbsp; In other words, he stated exactly what the manual states - which is wrong.&amp;nbsp; In any case I suggest that Albert or anyone else just try RIMASK set to all ones and again to all zeros and see what works and what doesn't.&amp;nbsp; That's what I had to do.&amp;nbsp; Notice that the default value is 0.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; Randy&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 02:55:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/Rit-mask-register/m-p/529615#M1582</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T02:55:47Z</dc:date>
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