LPCXpresso IDEのトピックRe: Problem

Problem

lpcware — Wed, 15 Jun 2016 22:15:48 GMT

Content originally posted in LPCWare by andrei.badila on Fri Sep 07 02:53:56 MST 2012
I'm use NXP LPC1114 and Any program that I want to write on the board gives me : Errror launching Debug\xxx.axf
02: Failed on connect : Ee(07). Bad Ack returned from status -wire error.:
I mention that I changed cable, USB port and same problem.
Also mention that after I wrote the following program on board began to show error.
Some ideea? Thanks very much!
void SSP_LoopbackTest( uint8_t portNum )
{
uint32_t i;

if ( portNum == 0 )
{
while(1){
#if !USE_CS
/* Set SSEL pin to output low. */
GPIOSetValue( PORT0, 2, 0 );
GPIOSetValue( PORT0, 2, 1 );
for ( i = 0; i < 0x25; i++ );
GPIOSetValue( PORT0, 2, 0 );
#endif
i = 0;
src_addr[0]=0x12;
src_addr[1]=0xFF;
while ( i <= SSP_BUFSIZE )
{
/* to check the RXIM and TXIM interrupt, I send a block data at one time
based on the FIFOSIZE(8). */

SSP_Send( portNum, (uint8_t *)&src_addr, FIFOSIZE );
/* If RX interrupt is enabled, below receive routine can be
also handled inside the ISR. */
// SSP_Receive( portNum, (uint8_t *)&dest_addr, FIFOSIZE );
i += FIFOSIZE;
}
#if !USE_CS
/* Set SSEL pin to output high. */
GPIOSetValue( PORT0, 2, 1 );
#endif
}}
else
{
#if !USE_CS
/* Set SSEL pin to output low. */
GPIOSetValue( PORT2, 0, 0 );
#endif
i = 0;
while ( i <= SSP_BUFSIZE )
{
/* to check the RXIM and TXIM interrupt, I send a block data at one time
based on the FIFOSIZE(8). */
SSP_Send( portNum, (uint8_t *)&src_addr, FIFOSIZE );
/* If RX interrupt is enabled, below receive routine can be
also handled inside the ISR. */
SSP_Receive( portNum, (uint8_t *)&dest_addr, FIFOSIZE );
i += FIFOSIZE;
}
#if !USE_CS
/* Set SSEL pin to output high. */
GPIOSetValue( PORT2, 0, 1 );
#endif
}
return;
}

/*****************************************************************************
** Function name:SEEPROMTest
**
** Descriptions:Serial EEPROM(Atmel 25xxx) test
**
** parameters:port #
** Returned value:None
**
*****************************************************************************/
void SSP_SEEPROMTest( uint8_t portNum )
{
uint32_t i, timeout;

if ( portNum == 0 )
{
LPC_IOCON->PIO0_2 &= ~0x07;/* SSP SSEL is a GPIO pin */
GPIOSetValue( PORT0, 2, 1 );
/* port0, bit 2 is set to GPIO output and high */
GPIOSetDir( PORT0, 2, 1 );

GPIOSetValue( PORT0, 2, 0 );
/* Test Atmel 25016 SPI SEEPROM. */
src_addr[0] = WREN;/* set write enable latch */
SSP_Send( portNum, (uint8_t *)src_addr, 1 );
GPIOSetValue( PORT0, 2, 1 );

for ( i = 0; i < DELAY_COUNT; i++ );/* delay minimum 250ns */

GPIOSetValue( PORT0, 2, 0 );
src_addr[0] = RDSR;/* check status to see if write enabled is latched */
SSP_Send( portNum, (uint8_t *)src_addr, 1 );
SSP_Receive( portNum, (uint8_t *)dest_addr, 1 );
GPIOSetValue( PORT0, 2, 1 );
if ( (dest_addr[0] & (RDSR_WEN|RDSR_RDY)) != RDSR_WEN )
/* bit 0 to 0 is ready, bit 1 to 1 is write enable */
{
while ( 1 );
}

for ( i = 0; i < SSP_BUFSIZE; i++ )/* Init RD and WR buffer */
{
src_addr[i+3] = i;/* leave three bytes for cmd and offset(16 bits) */
dest_addr = 0;
}

/* please note the first two bytes of WR and RD buffer is used for
commands and offset, so only 2 through SSP_BUFSIZE is used for data read,
write, and comparison. */
GPIOSetValue( PORT0, 2, 0 );
src_addr[0] = WRITE;/* Write command is 0x02, low 256 bytes only */
src_addr[1] = 0x00;/* write address offset MSB is 0x00 */
src_addr[2] = 0x00;/* write address offset LSB is 0x00 */
SSP_Send( portNum, (uint8_t *)src_addr, SSP_BUFSIZE );
GPIOSetValue( PORT0, 2, 1 );

for ( i = 0; i < 0x30000; i++ );/* delay, minimum 3ms */

timeout = 0;
while ( timeout < MAX_TIMEOUT )
{
GPIOSetValue( PORT0, 2, 0 );
src_addr[0] = RDSR;/* check status to see if write cycle is done or not */
SSP_Send( portNum, (uint8_t *)src_addr, 1);
SSP_Receive( portNum, (uint8_t *)dest_addr, 1 );
GPIOSetValue( PORT0, 2, 1 );
if ( (dest_addr[0] & RDSR_RDY) == 0x00 )/* bit 0 to 0 is ready */
{
    break;
}
timeout++;
}
if ( timeout == MAX_TIMEOUT )
{
while ( 1 );
}

for ( i = 0; i < DELAY_COUNT; i++ );/* delay, minimum 250ns */

GPIOSetValue( PORT0, 2, 0 );
src_addr[0] = READ;/* Read command is 0x03, low 256 bytes only */
src_addr[1] = 0x00;/* Read address offset MSB is 0x00 */
src_addr[2] = 0x00;/* Read address offset LSB is 0x00 */
SSP_Send( portNum, (uint8_t *)src_addr, 3 );
SSP_Receive( portNum, (uint8_t *)&dest_addr[3], SSP_BUFSIZE-3 );
GPIOSetValue( PORT0, 2, 1 );
}
else/* Port 1 */
{
LPC_IOCON->PIO2_0 &= ~0x07;/* SSP SSEL is a GPIO pin */
GPIOSetValue( PORT2, 0, 1 );
/* port0, bit 2 is set to GPIO output and high */
GPIOSetDir( PORT2, 0, 1 );

GPIOSetValue( PORT2, 0, 0 );
/* Test Atmel 25016 SPI SEEPROM. */
src_addr[0] = WREN;/* set write enable latch */
SSP_Send( portNum, (uint8_t *)src_addr, 1 );
GPIOSetValue( PORT2, 0, 1 );

for ( i = 0; i < DELAY_COUNT; i++ );/* delay minimum 250ns */

GPIOSetValue( PORT2, 0, 0 );
src_addr[0] = RDSR;/* check status to see if write enabled is latched */
SSP_Send( portNum, (uint8_t *)src_addr, 1 );
SSP_Receive( portNum, (uint8_t *)dest_addr, 1 );
GPIOSetValue( PORT2, 0, 1 );
if ( (dest_addr[0] & (RDSR_WEN|RDSR_RDY)) != RDSR_WEN )
/* bit 0 to 0 is ready, bit 1 to 1 is write enable */
{
while ( 1 );
}

for ( i = 0; i < SSP_BUFSIZE; i++ )/* Init RD and WR buffer */
{
src_addr[i+3] = i;/* leave three bytes for cmd and offset(16 bits) */
dest_addr = 0;
}

/* please note the first two bytes of WR and RD buffer is used for
commands and offset, so only 2 through SSP_BUFSIZE is used for data read,
write, and comparison. */
GPIOSetValue( PORT2, 0, 0 );
src_addr[0] = WRITE;/* Write command is 0x02, low 256 bytes only */
src_addr[1] = 0x00;/* write address offset MSB is 0x00 */
src_addr[2] = 0x00;/* write address offset LSB is 0x00 */
SSP_Send( portNum, (uint8_t *)src_addr, SSP_BUFSIZE );
GPIOSetValue( PORT2, 0, 1 );

for ( i = 0; i < 0x30000; i++ );/* delay, minimum 3ms */

timeout = 0;
while ( timeout < MAX_TIMEOUT )
{
GPIOSetValue( PORT2, 0, 0 );
src_addr[0] = RDSR;/* check status to see if write cycle is done or not */
SSP_Send( portNum, (uint8_t *)src_addr, 1);
SSP_Receive( portNum, (uint8_t *)dest_addr, 1 );
GPIOSetValue( PORT2, 0, 1 );
if ( (dest_addr[0] & RDSR_RDY) == 0x00 )/* bit 0 to 0 is ready */
{
break;
}
timeout++;
}
if ( timeout == MAX_TIMEOUT )
{
while ( 1 );
}

for ( i = 0; i < DELAY_COUNT; i++ );/* delay, minimum 250ns */

GPIOSetValue( PORT2, 0, 0 );
src_addr[0] = READ;/* Read command is 0x03, low 256 bytes only */
src_addr[1] = 0x00;/* Read address offset MSB is 0x00 */
src_addr[2] = 0x00;/* Read address offset LSB is 0x00 */
SSP_Send( portNum, (uint8_t *)src_addr, 3 );
SSP_Receive( portNum, (uint8_t *)&dest_addr[3], SSP_BUFSIZE-3 );
GPIOSetValue( PORT2, 0, 1 );
}
return;
}

/******************************************************************************
**   Main Function main()
******************************************************************************/
int main (void)
{
uint32_t i;
#if SSP_DEBUG
int8_t temp[2];
#endif

SystemInit();

#if SSP_DEBUG
UARTInit(115200);
#endif

SSP_IOConfig( SSP_NUM );/* initialize SSP port, share pins with SPI1
on port2(p2.0-3). */
SSP_Init( SSP_NUM );

for ( i = 0; i < SSP_BUFSIZE; i++ )
{
src_addr = (uint8_t)i;
dest_addr = 0;
}

#if TX_RX_ONLY
/* For the inter-board communication, one board is set as
master transmit, the other is set to slave receive. */
#if SSP_SLAVE
/* Slave receive */
SSP_Receive( SSP_NUM, (uint8_t *)dest_addr, SSP_BUFSIZE );
for ( i = 0; i < SSP_BUFSIZE; i++ )
{
if ( src_addr != dest_addr )
{
while ( 1 );/* Verification failure, fatal error */
}
}
#else
/* Master transmit */
SSP_Send( SSP_NUM, (uint8_t *)src_addr, SSP_BUFSIZE);
#endif
#else
/* TX_RX_ONLY=0, it's either an internal loopback test
within SSP peripheral or communicate with a serial EEPROM. */
#if LOOPBACK_MODE
SSP_LoopbackTest( SSP_NUM );
#else
SSP_SEEPROMTest( SSP_NUM );
/* If SW CLK is used as SSP clock, change the setting before
serial EEPROM test, restore after the test. */
#ifdef __JTAG_DISABLED
LPC_IOCON->SWCLK_PIO0_10 &= ~0x07;/* Restore SWD CLK */
#endif
#endif/* endif NOT LOOPBACK_MODE */
#if LOOPBACK_MODE
for ( i = 0; i < SSP_BUFSIZE; i++ )
#else
/* for EEPROM test, verifying, ignore the difference in the first
three bytes which are used as command and parameters. */
for ( i = 3; i < SSP_BUFSIZE; i++ )
#endif
{
if ( src_addr != dest_addr )
{
#if SSP_DEBUG
temp[0] = (dest_addr & 0xF0) >> 4;
if ( (temp[0] >= 0) && (temp[0] <= 9) )
{
temp[0] += 0x30;
}
else
{
temp[0] -= 0x0A;
temp[0] += 0x41;
}
temp[1] = dest_addr & 0x0F;
if ( (temp[1] >= 0) && (temp[1] <= 9) )
{
temp[1] += 0x30;
}
else
{
temp[1] -= 0x0A;
temp[1] += 0x41;
}
UARTSend((uint8_t *)&temp[0], 2);
UARTSend("\r\n", 2);
#endif
while( 1 );/* Verification failed */
}
}
#if SSP_DEBUG
UARTSend("PASS\r\n", 6);
#endif
#endif/* endif NOT TX_RX_ONLY */
return 0;
}

/******************************************************************************
**                            End Of File
******************************************************************************/

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:49 GMT

Content originally posted in LPCWare by Ex-Zero on Fri Sep 07 04:29:15 MST 2012
And did you enable vector catch and switch to ISP already?

See: http://support.code-red-tech.com/CodeRedWiki/DebugAccessChip

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:50 GMT

Content originally posted in LPCWare by andrei.badila on Fri Sep 07 05:49:23 MST 2012

Quote: Zero
And did you enable vector catch and switch to ISP already?

See: http://support.code-red-tech.com/CodeRedWiki/DebugAccessChip

Sorry zero i don't found ISP pin( PIN 0.1). Please tell me wherein ISP PIN. I don't speak very good English, please explain to me the steps to do:
"That is, GND the ISP pin, assert RST, then remove the GND to ISP pin. Once in the ISP bootloader, the target clock configuration is stable, and the debug pins are in their default state - you should be able to connect.
Note: The ISP pin is:
P0.1 - for LPC11xx and LPC13xx"

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:50 GMT

Content originally posted in LPCWare by Ex-Zero on Fri Sep 07 06:07:24 MST 2012
Then try Google:

Quote:

Asta este, GND pini ISP-ul, afirma RST, apoi scoate?i GND la ISP pini. Dupa ce în bootloader ISP-ul, configurare ceasul ?inta este stabila, iar pinii de depanare sunt în starea implicita a acestora - ar trebui sa fie în masura sa se conecteze.
Nota: PIN-ul ISP este: P0.1 - pentru LPC11xx ?i LPC13xx

So just ground ISP pin, reset your board, release ISP pin and try to debug again.

ISP pin P0.1 (or PIO0_1) is described in schematic: http://www.embeddedartists.com/sites/default/files/docs/schematics/LPCXpressoLPC1114revA.pdf

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:51 GMT

Content originally posted in LPCWare by andrei.badila on Fri Sep 07 06:14:39 MST 2012
The photo of the bord is here

http://dl.transfer.ro/photo-transfer_ro-07sep-76ab2b.rar

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:52 GMT

Content originally posted in LPCWare by andrei.badila on Fri Sep 07 06:24:54 MST 2012
I have assert gnd to rst, release, and some problem.

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:52 GMT

Content originally posted in LPCWare by Ex-Zero on Fri Sep 07 06:32:53 MST 2012

Quote: andrei.badila
The photo of the bord is here

http://dl.transfer.ro/photo-transfer_ro-07sep-76ab2b.rar

And there: http://www.embeddedartists.com/sites/default/files/image/product/xpr_lpc1114.png

And there: http://www.embeddedartists.com/products/lpcxpresso/lpc1114_xpr.php

Where you can also find the schematic link I've posted already :)

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:53 GMT

Content originally posted in LPCWare by andrei.badila on Fri Sep 07 06:46:12 MST 2012
I font the st, i found the rst, and have conection and release, rezolts some problem

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:53 GMT

Content originally posted in LPCWare by andrei.badila on Fri Sep 07 08:57:39 MST 2012
I want to instal teem viewer and give full acces to my computer, plese tel if you agreea. My skype name is simionandrei.badila

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:54 GMT

Content originally posted in LPCWare by Ex-Zero on Fri Sep 07 19:56:15 MST 2012
TeamViewer can't help to switch to ISP :rolleyes:

This video describes how to switch your board to ISP: http://youtu.be/chFv1EiZcYo http://http://youtu.be/3sqpPYe2RCs

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:54 GMT

Content originally posted in LPCWare by andrei.badila on Sat Sep 08 08:19:47 MST 2012
Thank's for all zero:)! I confused ISP pin with RST pin.:D

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:55 GMT

Content originally posted in LPCWare by andrei.badila on Thu Sep 13 11:12:52 MST 2012
Hi Zero,
I have new problem.
I want to comunicate by bus spi with da1 module. My problem is i dont know what spi port to use. I use port 1 and 0, and i conect osciloscope to my board( pin mosi , ssel, sck) and this pin not change.
Please give me a ideea thx

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:55 GMT

Content originally posted in LPCWare by Ex-Zero on Thu Sep 13 11:51:50 MST 2012
Use Sample in #14 http://knowledgebase.nxp.com/showthread.php?t=2372 to learn how SSP is working ;)

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:56 GMT

Content originally posted in LPCWare by andrei.badila on Thu Sep 13 13:22:17 MST 2012
I download your project and the compilator not found this header
#include "system_LPC11xx.h"

DescriptionResourcePathLocationType
fatal error: system_LPC11xx.h: No such file or directorycr_startup_lpc11.c/LPC11_SPI_4_dummies/srcline 51C/C++ Problem

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:57 GMT

Content originally posted in LPCWare by Ex-Zero on Thu Sep 13 14:47:50 MST 2012
This is a CMSIS 2.0 project and including ${workspace_loc:/CMSISv2p00_LPC11xx/inc} ;)

Re: Problem

lpcware — Wed, 15 Jun 2016 22:15:57 GMT

Content originally posted in LPCWare by andrei.badila on Thu Sep 13 14:54:33 MST 2012

Quote: Zero
This is a CMSIS 2.0 project and including ${workspace_loc:/CMSISv2p00_LPC11xx/inc} ;)

Thx very much