LPCXpresso IDE中的主题 Re: CoreClock setting LPC1769

CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:33 GMT

Content originally posted in LPCWare by tridentsx on Mon Dec 05 08:52:51 MST 2011
I have been trying to setup the clock to run at 120MHz but I only get 100MHz
Below are the defined that I use in system_LPC17xx.c.
I have tried both
[SIZE=2][/SIZE]
[SIZE=2]PLL0CFG_Val 0x00000013 [/SIZE]
[SIZE=2]PLL0CFG_Val [COLOR=#3f7f5f]0x00050063[/COLOR][/SIZE]
[SIZE=2][/SIZE]
[SIZE=2]My board is a lpx xpresso lpc1769, anyone else has the board running at 120MHz that could share their settings ?[/SIZE]
[SIZE=2][/SIZE]
[SIZE=2]Thanks /// Carl[/SIZE]

[B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] CLOCK_SETUP 1[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] SCS_Val 0x00000020[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] CLKSRCSEL_Val 0x00000001[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] PLL0_SETUP 1[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] PLL0CFG_Val 0x00000013 [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]// default value 0x00050063[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] PLL1_SETUP 1[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] PLL1CFG_Val 0x00000023[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] CCLKCFG_Val 0x00000003[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] USBCLKCFG_Val 0x00000000[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] PCLKSEL0_Val 0x00000000[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] PCLKSEL1_Val 0x00000000[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] PCONP_Val 0x042887DE[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] CLKOUTCFG_Val 0x00000000
[/SIZE]

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:34 GMT

Content originally posted in LPCWare by dragilla on Mon Dec 05 09:16:40 MST 2011
# Define PLL0CFG_Val 0x00050077 / / MSEL = 119, NSEL = 5 for 120MHz

found here: http://todotani.cocolog-nifty.com/blog/2011/04/lpcxpresso-lpc1.html
(use google translate)

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:34 GMT

Content originally posted in LPCWare by Ex-Zero on Mon Dec 05 09:36:27 MST 2011
I would prefer

#define PLL0CFG_Val 0x00050077

but

#define PLL0CFG_Val 0x00000013

(M=20,N=1,FCC0 = 480MHZ)

is also working. Why do you think this value isn't working?

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:35 GMT

Content originally posted in LPCWare by dragilla on Mon Dec 05 10:03:48 MST 2011
Which one IS working and which one is NOT? Because I'm confused now.
And how do you check if it's wokring?

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:35 GMT

Content originally posted in LPCWare by Ex-Zero on Mon Dec 05 10:28:07 MST 2011

Quote:
Which one IS working and which one is NOT? Because I'm confused now.

There's more than one valid setting :eek:

#define PLL0CFG_Val 0x00050077
#define PLL0CFG_Val 0x00000013

are of course both working. UM explains how they are calculated.

Quote:
And how do you check if it's wokring?

Just use CLKOUT to scope it :eek:

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:36 GMT

Content originally posted in LPCWare by tridentsx on Mon Dec 05 10:30:15 MST 2011

Quote: Zero
I would prefer

#define PLL0CFG_Val 0x00050077

but

#define PLL0CFG_Val 0x00000013

(M=20,N=1,FCC0 = 480MHZ)

is also working. Why do you think this value isn't working?

Because when i print the variable [SIZE=2]
[LEFT][/SIZE][B][SIZE=2][COLOR=#642880][SIZE=2][COLOR=#642880]printf[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2]([/SIZE][SIZE=2][COLOR=#2a00ff][SIZE=2][COLOR=#2a00ff]"\n\rSystemCoreClock %u"[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2],SystemCoreClock);[/LEFT]
[/SIZE]it outputs
[SIZE=2][COLOR=#2a00ff]SystemCoreClock [/COLOR][/SIZE]100000000

regards /// Carl

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:37 GMT

Content originally posted in LPCWare by Ex-Zero on Mon Dec 05 10:43:29 MST 2011
And where did you change PLL0CFG_Val?

Did you rebuild CMSIS and actual project after this?

Did you use debugger to control PLL0CFG?

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:37 GMT

Content originally posted in LPCWare by tridentsx on Mon Dec 05 16:44:11 MST 2011
I found the problem it was a stupid misstake I had changed the library target to release while my [project was linking the debug version which was 3 months old.

Thanks for all the help

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:38 GMT

Content originally posted in LPCWare by Lumos on Mon May 20 01:51:43 MST 2013
Hello, I am investigating how to change my LPC1769 clock settings to 120 MHz. My PLL0CFG_Val has value 0x00050077, but after calling of SystemClockUpdate() function, SystemFrequency variable is 72000000 (72 MHz). I tried to play with PLL0CFG_Val but without any effect. Still 72 MHz.
Do someone know what exactly and where should be changed to reach 120 MHz clock?

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:38 GMT

Content originally posted in LPCWare by kabriolin on Mon May 20 02:03:14 MST 2013
Hi,

You can find attached files for 1769 clock settings.
In the C file you can find an array: MainOscPLL0conf
With differents pre-set clock speed, you can add your own.

To use it, just call "LPC_SetPLL0(FREQUENCE_CPU);"
With "FREQUENCE_CPU" defined as the speed you want (ex: 120000000).

[ATTACH]1034[/ATTACH]

[ATTACH]1035[/ATTACH]

Re: CoreClock setting LPC1769

lpcware — Thu, 16 Jun 2016 00:48:39 GMT

Content originally posted in LPCWare by R2D2 on Mon May 20 02:33:27 MST 2013

Quote: Lumos
Hello, I am investigating how to change my LPC1769 clock settings to 120 MHz. My PLL0CFG_Val has value 0x00050077, but after calling of SystemClockUpdate() function, SystemFrequency variable is 72000000 (72 MHz). I tried to play with PLL0CFG_Val but without any effect. Still 72 MHz.
Do someone know what exactly and where should be changed to reach 120 MHz clock?

Did you read this thread?

Quote: Zero
And where did you change PLL0CFG_Val?

Did you rebuild CMSIS and actual project after this?

Did you use debugger to control PLL0CFG?