LPCXpresso IDEのトピックRe: Uart

Uart

lpcware — Wed, 15 Jun 2016 23:29:15 GMT

Content originally posted in LPCWare by karanmehta93 on Wed Oct 17 08:13:22 MST 2012
What are the limiting conditions in the THRE interrupt to prevent it's accidential calls?
What would happen if my UART FIFO's are disabled and I try to add another no in UnTHR while the last no. is in transit ?

Re: Uart

lpcware — Wed, 15 Jun 2016 23:29:16 GMT

Content originally posted in LPCWare by karanmehta93 on Mon Oct 22 06:42:56 MST 2012
Hey why is anyone not replying......!!!!!!!!!!! 'Zero' plzzz reply...... my work has stopped

Re: Uart

lpcware — Wed, 15 Jun 2016 23:29:17 GMT

Content originally posted in LPCWare by ArtjomGromak on Mon Oct 22 07:02:06 MST 2012

Quote: karanmehta93

What would happen if my UART FIFO's are disabled and I try to add another no in UnTHR while the last no. is in transit ?

Try to check the situation in hardware. :)

I think LPC_UART has no flag to indicate transmit fifo overflow.
Why you don't want use FIFO?

Re: Uart

lpcware — Wed, 15 Jun 2016 23:29:18 GMT

Content originally posted in LPCWare by daniel.widyanto on Mon Oct 22 21:34:54 MST 2012
Read the User Manual:

USART FIFO Control Register (FCR - address xxxx_xxxx)
FIFOEN = 0 -> USART FIFOs are disabled. Must not be used in the application.

Re: Uart

lpcware — Wed, 15 Jun 2016 23:29:18 GMT

Content originally posted in LPCWare by karanmehta93 on Thu Oct 25 02:43:44 MST 2012
Hey guys.......
This is not an ans to my question..........