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    <title>LPC FAQsのトピックHow does the acknowledge and error detection system work?</title>
    <link>https://community.nxp.com/t5/LPC-FAQs/How-does-the-acknowledge-and-error-detection-system-work/m-p/590615#M151</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Every message frame sent is a broadcast to all other CAN controllers on the bus. Every CAN controller&lt;BR /&gt;that is enabled and configured to the bus bitrate, whether it actively receives messages or not, detects&lt;BR /&gt;and monitors all frames bit by bit. Each frame contains a CRC checksum over data and identifier and an&lt;BR /&gt;acknowledge “slot”, a bit which is transmitted as recessive. When a monitoring CAN controller gets to&lt;BR /&gt;the acknowledge slot it compares the calculated with the transmitted checksum to make sure they&lt;BR /&gt;match. If they match then the monitoring CAN controllers transmit a dominant bit in the slot. If there is&lt;BR /&gt;a mismatch, the monitoring CAN controller will transmit an “error frame”, six consecutive dominant bits&lt;BR /&gt;to indicate that all other CAN controllers on the bus should discard the frame. The sending CAN&lt;BR /&gt;controller observes the bus during the acknowledge slot. If it is recessive then it knows that there were&lt;BR /&gt;no receivers and it will resend the frame.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;"FAQ contribution from Embedded Systems Academy, experts in CAN bus. For more information visit &lt;A href="http://www.esacademy.com"&gt;www.esacademy.com&lt;/A&gt;"&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 02 Sep 2016 21:51:24 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-09-02T21:51:24Z</dc:date>
    <item>
      <title>How does the acknowledge and error detection system work?</title>
      <link>https://community.nxp.com/t5/LPC-FAQs/How-does-the-acknowledge-and-error-detection-system-work/m-p/590615#M151</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Every message frame sent is a broadcast to all other CAN controllers on the bus. Every CAN controller&lt;BR /&gt;that is enabled and configured to the bus bitrate, whether it actively receives messages or not, detects&lt;BR /&gt;and monitors all frames bit by bit. Each frame contains a CRC checksum over data and identifier and an&lt;BR /&gt;acknowledge “slot”, a bit which is transmitted as recessive. When a monitoring CAN controller gets to&lt;BR /&gt;the acknowledge slot it compares the calculated with the transmitted checksum to make sure they&lt;BR /&gt;match. If they match then the monitoring CAN controllers transmit a dominant bit in the slot. If there is&lt;BR /&gt;a mismatch, the monitoring CAN controller will transmit an “error frame”, six consecutive dominant bits&lt;BR /&gt;to indicate that all other CAN controllers on the bus should discard the frame. The sending CAN&lt;BR /&gt;controller observes the bus during the acknowledge slot. If it is recessive then it knows that there were&lt;BR /&gt;no receivers and it will resend the frame.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;"FAQ contribution from Embedded Systems Academy, experts in CAN bus. For more information visit &lt;A href="http://www.esacademy.com"&gt;www.esacademy.com&lt;/A&gt;"&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 02 Sep 2016 21:51:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-FAQs/How-does-the-acknowledge-and-error-detection-system-work/m-p/590615#M151</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-09-02T21:51:24Z</dc:date>
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