LPC MicrocontrollersのトピックRe: xtalin xtalout using IRC source clock

xtalin xtalout using IRC source clock

lpcware — Wed, 15 Jun 2016 19:30:36 GMT

Content originally posted in LPCWare by brattchess on Wed Mar 04 11:53:46 MST 2015
Hello,

I want to use the micro with the IRC source clock.
I would like to know how I need to connect this pins.
Can I leave these without connect to ground or Vcc?

Re: xtalin xtalout using IRC source clock

lpcware — Wed, 15 Jun 2016 19:30:37 GMT

Content originally posted in LPCWare by R2D2 on Wed Mar 04 11:57:02 MST 2015
See:

http://www.lpcware.com/content/forum/purpose-of-grounding-xtalin-pin-if-external-osc-not-used

Re: xtalin xtalout using IRC source clock

lpcware — Wed, 15 Jun 2016 19:30:38 GMT

Content originally posted in LPCWare by brattchess on Thu Mar 05 00:52:52 MST 2015
Is it correct this configuration to use the IRC source clock and the clockout of th PLL system will be 12Mhz?

#define SETTINGIRC2\
LPC_SYSCON->SYSAHBCLKDIV      = 0x1;      /*set clock divider for core to 1*/\
LPC_SYSCON->MAINCLKSEL        &= ~(0x03); /*set “main clock” to IRC oscillator, if not system will lock up when PLL turns off!(sec. 3.5.11)*/\
LPC_SYSCON->MAINCLKUEN        &= ~(1);     /*write a zero to the MAINCLKUEN register (sec. 3.5.12), necessary for MAINCLKSEL to update*/\
LPC_SYSCON->MAINCLKUEN        |= 1;        /*write a one to the MAINCLKUEN register (sec. 3.5.12), necessary for MAINCLKSEL to update*/\
\
LPC_SYSCON->SYSOSCCTRL = 0x00; \
\
LPC_SYSCON->SYSPLLCLKSEL      = 0x00;      /*connect IRC oscillator to SYSTEM PLL (sec. 3.5.9)*/\
LPC_SYSCON->SYSPLLCLKUEN      &= ~(1);     /*write a zero to SYSPLLUEN register (sec. 3.5.10), necessary for SYSPLLCLKSEL to update*/\
LPC_SYSCON->SYSPLLCLKUEN      |= 1;        /*write a one to SYSPLLUEN register (sec. 3.5.10), necessary for SYSPLLCLKSEL to update*/\
LPC_SYSCON->PDRUNCFG          |= (1<<7);   /*power down the PLL before changing divider values (sec 3.5.35)*/\
LPC_SYSCON->SYSPLLCTRL        = 0x00;      /*set MSEL = 0x00011 and PSEL = 0x01 (sec 3.5.3 and table 46 of sec. 3.11.4.1)*/\
LPC_SYSCON->PDRUNCFG          &= ~(1<<7); /*power up PLL after divider values changed (sec. 3.5.35)*/\
while((LPC_SYSCON->SYSPLLSTAT & 1) == 0); /*wait for PLL to lock*/\
LPC_SYSCON->MAINCLKSEL        = 0x03;      /*set system oscillator to the output of the PLL (sec. 3.5.11)*/\
LPC_SYSCON->MAINCLKUEN        &= ~(1);     /*write a zero to the MAINCLKUEN register (sec. 3.5.12), necessary for MAINCLKSEL to update*/\
LPC_SYSCON->MAINCLKUEN        |= 1;        /*write a one to the MAINCLKUEN register (sec. 3.5.12)*/

Re: xtalin xtalout using IRC source clock

lpcware — Wed, 15 Jun 2016 19:30:38 GMT

Content originally posted in LPCWare by R2D2 on Thu Mar 05 17:40:01 MST 2015

Quote: brattchess

LPC_SYSCON->SYSPLLCTRL = 0x00; /*set MSEL = 0x00011 and PSEL = 0x01 (sec 3.5.3 and table 46 of sec.

:quest:

M = 1 and P = 1 is not generating a valid FCCO :((

UM:

Quote:
FCCO Frequency of the Current Controlled Oscillator (CCO); 156 to 320 MHz.

Re: xtalin xtalout using IRC source clock

lpcware — Wed, 15 Jun 2016 19:30:39 GMT

Content originally posted in LPCWare by brattchess on Sat Mar 07 02:23:36 MST 2015
Hello,

You are right.
I was checking which clock is more stable.
I configured the PLL to obtain 12MHz or the IRC directly to Main clock.
I could not detect any important difference.
Could someone explain me which solution could be better?

Re: xtalin xtalout using IRC source clock

lpcware — Wed, 15 Jun 2016 19:30:40 GMT

Content originally posted in LPCWare by R2D2 on Sat Mar 07 03:28:45 MST 2015

Quote: brattchess
Could someone explain me which solution could be better?

To use PLL to generate 12MHz from 12MHz isn't very useful at all :((

User manual:

Quote:
PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.

Re: xtalin xtalout using IRC source clock

lpcware — Wed, 15 Jun 2016 19:30:40 GMT

Content originally posted in LPCWare by brattchess on Sat Mar 07 06:08:27 MST 2015
Hello,

Depending on the PLL SYSTEM would be more stable than the IRC directly.