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    <title>LPC MicrocontrollersのトピックReset after setting M3MEMMAP Register</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Reset-after-setting-M3MEMMAP-Register/m-p/529790#M9874</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by gianlucarenzi on Mon Nov 19 09:06:56 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I am stuck on a reset-after-setting-the-m3memmap register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Scenario: my application (a bootmonitor) is loaded from SPIFI at boot.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Before running main() it relocate itself into SRAM address space (0x1000_0000) VTOR and other stuff.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It uses the SPIFI (ROM)Library to access the SPIFI Device (64Mbit) to program/erase the device using a simple protocol via UART interface.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;When the bootmonitor receive a JUMP instruction to execute the user-application something goes wrong:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The SPIFI Area (between 0 - 0x0008_0000) 512K are reserved for bootmonitor itself (remapped 0x1400_0000 - 0x1408_0000).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The SPIFI Area (between 0x0008_0000 up to 7.5MBytes) are reserved for user application (linked-relocated at 0x0000_0000 but physically located at those address space 0x1408_0000...0x1478_0000)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The bootmonitor when receive the JUMP command:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1- set the M3MEMMAP register to 0x1408_0000 (so at the next M3-reset the address 0x0000_0000 is relocated at 0x1408_0000) where are the VTORs data (SP, Reset Handler, Exception Handlers,...)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2- disable every interrupt using __disable_irq() provided by the CMSIS-Library&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;3- Hit a PERIPH_RST writing RGU_SIG_PERIPH bit (1) in the LPC_RGU-&amp;gt;RESET_CTRL0 register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Nothing happens. I thought my application stack pointer and Reset Handler started, but nothing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If I use the RGU_SIG_CORE bit (0) in the LPC_RGU-&amp;gt;RESET_CTRL0 register, ALL the system is rebooted as the PowerOn, so the M3MEMMAP has the 0x8000_0000 value.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Where I am doing the wrong thing?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Please help me,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Gianluca&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:17:23 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:17:23Z</dc:date>
    <item>
      <title>Reset after setting M3MEMMAP Register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Reset-after-setting-M3MEMMAP-Register/m-p/529790#M9874</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by gianlucarenzi on Mon Nov 19 09:06:56 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I am stuck on a reset-after-setting-the-m3memmap register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Scenario: my application (a bootmonitor) is loaded from SPIFI at boot.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Before running main() it relocate itself into SRAM address space (0x1000_0000) VTOR and other stuff.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It uses the SPIFI (ROM)Library to access the SPIFI Device (64Mbit) to program/erase the device using a simple protocol via UART interface.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;When the bootmonitor receive a JUMP instruction to execute the user-application something goes wrong:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The SPIFI Area (between 0 - 0x0008_0000) 512K are reserved for bootmonitor itself (remapped 0x1400_0000 - 0x1408_0000).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The SPIFI Area (between 0x0008_0000 up to 7.5MBytes) are reserved for user application (linked-relocated at 0x0000_0000 but physically located at those address space 0x1408_0000...0x1478_0000)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The bootmonitor when receive the JUMP command:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1- set the M3MEMMAP register to 0x1408_0000 (so at the next M3-reset the address 0x0000_0000 is relocated at 0x1408_0000) where are the VTORs data (SP, Reset Handler, Exception Handlers,...)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2- disable every interrupt using __disable_irq() provided by the CMSIS-Library&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;3- Hit a PERIPH_RST writing RGU_SIG_PERIPH bit (1) in the LPC_RGU-&amp;gt;RESET_CTRL0 register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Nothing happens. I thought my application stack pointer and Reset Handler started, but nothing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If I use the RGU_SIG_CORE bit (0) in the LPC_RGU-&amp;gt;RESET_CTRL0 register, ALL the system is rebooted as the PowerOn, so the M3MEMMAP has the 0x8000_0000 value.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Where I am doing the wrong thing?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Please help me,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Gianluca&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:17:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Reset-after-setting-M3MEMMAP-Register/m-p/529790#M9874</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:17:23Z</dc:date>
    </item>
    <item>
      <title>Re: Reset after setting M3MEMMAP Register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Reset-after-setting-M3MEMMAP-Register/m-p/529791#M9875</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by uratan on Tue Nov 20 03:44:23 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm trying LPC1830 (rev.A).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;gt; 1- ... (so at the next M3-reset&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Yes it is just after next reset that the CPU fetches vectors,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;but it seems that the effect of M3MEMMAP is appeared real-time-ly.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;So...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;gt; 2- disable every interrupt&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;this shall be done first before changing M3MEMMAP, I think.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;gt; 3- Hit a PERIPH_RST&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;PERIPH_RST will reset SPIFI interface logic, connection to&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SPIFI-flash will be lost.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;After reset, your user-application code/vector on SPIFI-flash&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;can not be read by CPU, because boot-ROM codes which initializes&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SPIFI interface are not run.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Try more narrow range reset like M3_RST if you want to keep&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;peripheral settings like SPIFI/UART/GPIO or misc clocks.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I think that Reset-System-Hierarchy description in UM10430 is a little hard to grab.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;On Fig 30, all unit connection shall be drawn without omission to trace, I expect.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; (I'm still seeking how CGU/CCU is reset...)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;-- &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;&amp;nbsp; &amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww002.upp.so-net.ne.jp%2Furatan%2Fxplr%2Fendex.html" rel="nofollow" target="_blank"&gt;http://www002.upp.so-net.ne.jp/uratan/xplr/endex.html&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:17:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Reset-after-setting-M3MEMMAP-Register/m-p/529791#M9875</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:17:24Z</dc:date>
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