<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC Microcontrollers中的主题 Re: LPC11C24 - vector remap generates HardFault</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529722#M9861</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bomba82 on Fri Jan 31 04:13:00 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I'd want to try a workaround, but I don't know how to implement it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;My idea is as follows.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I should exclude CAN reserved RAM from remapping, and I can simply do it with subsequent code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
int i = 0;
__disable_irq();
int32_t *p = (int32_t *) RELOC_ADDR;
// copy the interrupt vector table on base RAM
for (i=0;i&amp;lt;(MEMREMAP_SIZE &amp;gt;&amp;gt; 2);i++)
{
if ( &amp;amp;vector_in_ram&lt;I&gt; &amp;lt; ((int32_t *)0x10000050) || &amp;amp;vector_in_ram&lt;I&gt; &amp;gt; ((int32_t *)0x100000B8) )
{
vector_in_ram&lt;I&gt; = *p;
}
p++;
}
LPC_SYSCON-&amp;gt;SYSMEMREMAP = 0x1;&amp;nbsp; // remap the interrupt vectors to ram
__enable_irq(); // enable interrupts
&lt;/I&gt;&lt;/I&gt;&lt;/I&gt;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now the problem would be that I am not copying a part of my code in flash. But what if I fill that range (0x0050 to 0x00B8) of unuseful code? My problem now is that I don't know how to do that. In the linker script I can define the flash region for the code, but I don't know how to define an unusable hole.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Does someone know? Or does someone know if it's a bad idea?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:29:37 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:29:37Z</dc:date>
    <item>
      <title>LPC11C24 - vector remap generates HardFault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529719#M9858</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bomba82 on Fri Jan 31 01:47:26 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; I am trying to implement a solution for upgrading firmware using a CAN second bootloader approach.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;To do so I need to remap vectors for the application firmware. Since bootloader fits in 2 pages, my application executes from address 0x2000 and then I need to use vector remapping to RAM.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I had success in my first attempt to upgrade firmware with a simple blinky project. The problems arose when I tried to add CAN communication to that simple project: I get a HardFault error after I make the first call to "can_transmit" function.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;To simplify things I tried to execute the project in debug configuration from address 0x0000.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;If I execute the project without remapping everything is ok.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;If I execute the same project trying to remap vectors from 0x0000 to 0x10000000 (SYSMEMREMAP=1) I get that HardFault error. (there is no sense to do that remapping, but it's just to test remapping in the easiest way)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I read the user manual and many threads on this forum but I can't figure out what I am doing wrong. Does someone have any suggestions?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I attach the BlinkyCAN project. It's very simple to view the problem:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;1) try to execute the project as provided. It should execute correctly on a LPC11C24 LPCXpresso Board. The LED should blink.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2) Set the "EXCLUDE_CAN" macro to 0. The HardFault problem arises.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-337963"&gt;BlinkyCAN.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:29:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529719#M9858</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:29:34Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 - vector remap generates HardFault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529720#M9859</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DodigI on Fri Jan 31 02:42:21 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Unfortunately you cannot remap vector table to RAM and use CCAN drivers at the same time. The reason being is that CCAN driver use absolute addresses in that RAM region which you MUST specify in the linker configuration.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;I&gt;On-chip RAM from address 0x1000 0050 to 0x1000 00B8 is used by the CAN API. This address&lt;BR /&gt;range should not be used by the application. For applications using the on-chip CAN API,&lt;BR /&gt;the linker control file should be modified appropriately to prevent usage of this area for&lt;BR /&gt;application’s variable storage.&lt;/I&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;There is another way by implementing jumps in the bootloader interrupts. I have modified the startup.s file with some additional assembly code. There is an application note for this, please see AN10995 from NXP.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Enjoy&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:29:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529720#M9859</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:29:35Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 - vector remap generates HardFault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529721#M9860</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bomba82 on Fri Jan 31 03:46:10 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Dodigl and thanks for the response.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I started my adventure with second bootloader reading AN10995. The problem is that I changed my approach to vector remapping beacuse implementing jumps seemed to be unusable in my case. I need to use ISRs in the bootloader, for example SSP ISR. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Am I wrong taking this assumption? There are some threads asking if it's possible to implement a bootloader and use ISRs, but I couldn't find a final response to the question. I thought the right solution was remapping, but maybe it is not...&amp;nbsp; :( &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:29:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529721#M9860</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:29:36Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 - vector remap generates HardFault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529722#M9861</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bomba82 on Fri Jan 31 04:13:00 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I'd want to try a workaround, but I don't know how to implement it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;My idea is as follows.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I should exclude CAN reserved RAM from remapping, and I can simply do it with subsequent code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
int i = 0;
__disable_irq();
int32_t *p = (int32_t *) RELOC_ADDR;
// copy the interrupt vector table on base RAM
for (i=0;i&amp;lt;(MEMREMAP_SIZE &amp;gt;&amp;gt; 2);i++)
{
if ( &amp;amp;vector_in_ram&lt;I&gt; &amp;lt; ((int32_t *)0x10000050) || &amp;amp;vector_in_ram&lt;I&gt; &amp;gt; ((int32_t *)0x100000B8) )
{
vector_in_ram&lt;I&gt; = *p;
}
p++;
}
LPC_SYSCON-&amp;gt;SYSMEMREMAP = 0x1;&amp;nbsp; // remap the interrupt vectors to ram
__enable_irq(); // enable interrupts
&lt;/I&gt;&lt;/I&gt;&lt;/I&gt;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now the problem would be that I am not copying a part of my code in flash. But what if I fill that range (0x0050 to 0x00B8) of unuseful code? My problem now is that I don't know how to do that. In the linker script I can define the flash region for the code, but I don't know how to define an unusable hole.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Does someone know? Or does someone know if it's a bad idea?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:29:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529722#M9861</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:29:37Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 - vector remap generates HardFault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529723#M9862</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DodigI on Fri Jan 31 10:04:09 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;What tool are you using?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;In Keil it is very easy via the provided GUI configuration (no scatter file modification). &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm 99.99999% sure that it is not possible to make it work the way you proposed, because the RAM region for CCAN is right in the middle of the vector table. CPU loads ISRs automatically, this cannot be controlled by software.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I understand you problem, my bootloader uses only CCAN ISR which is the same for the application also. Maybe you should try pooling instead of using interrupts in the bootloader.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Another option is to switch to LPC1300 which is pin compatible with LPC1100 but you lose CAN PHY. LPC1300 has a Cortex M3 which can remap vector table to another location in flash.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Good luck.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:29:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529723#M9862</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:29:37Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 - vector remap generates HardFault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529724#M9863</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bomba82 on Mon Feb 03 09:39:25 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am using eclipse, but I think it was a bad idea.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now I understand what you said and I agree that it's not possible to make things work as I proposed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;That's why I switched back to the solution with jumps to application ISRs. I can use the same ISR for bootloader and application, so I don't redirect CAN ISR. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I did a first attempt with the simple blinky project and I had success. Just a note: I had to write &lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
&amp;nbsp; LPC_SYSCON-&amp;gt;SYSMEMREMAP = 0x2;
&amp;nbsp; __enable_irq(); // enable interrupts
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt;at the beginning of application main. Otherwise blinky project does not execute correctly.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Second attempt: blinky with CAN. I can't make things work. After launching the target application something goes wrong. I can see a message correctly transmitted on the network, but then it doesn't reply to my CAN messages and even the LED doesn't blink. This time I don't even know how I can debug it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Does someone have a suggestion? What's wrong this time?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:29:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529724#M9863</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:29:38Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 - vector remap generates HardFault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529725#M9864</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bomba82 on Wed Feb 05 06:53:19 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Dodigl,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; after implementing the version with jumps in the ISRs I discivered that the only ISR that caused me problems was CAN ISR. I then followed your suggestion and implemented a version with polling and now everything works fine. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I can't still understand why I can't use the CAN ISR, since in this last implementation I can't see address conflicts. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you very much for your help! But if you know why I can't use that interrupt, please let me know. I want to understand why.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:29:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-vector-remap-generates-HardFault/m-p/529725#M9864</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:29:38Z</dc:date>
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  </channel>
</rss>

