topic Re: LPC18xx LCD Controller SDRAM with DMA in LPC Microcontrollers

LPC18xx LCD Controller SDRAM with DMA

lpcware — Wed, 15 Jun 2016 18:16:53 GMT

Content originally posted in LPCWare by MX21 on Fri Feb 12 11:03:02 MST 2016
I'm using the LCD Controller in the LPC1857 to run a TFT display. We have an SDRAM connected to the EMC for the display memory.

I'm testing DMA to transfer the memory from SRAM to SDRAM. When I do this, the display appears to lose sync during the DMA transfer. As soon as the DMA is complete, the display is good and has the data I transferred.

Is there some conflict between the LCD Controller and the DMA when accessing SDRAM over EMC? It seems the LCD Controller is not getting it's data properly when DMA is accessing the same memory.

If I just memcpy the data, it all looks clean.

Thanks

Re: LPC18xx LCD Controller SDRAM with DMA

lpcware — Wed, 15 Jun 2016 18:16:54 GMT

Content originally posted in LPCWare by mc on Fri Feb 12 12:51:48 MST 2016
Hi MX21,
Large transfer size may be affecting it. Could you please reduce DMA transfer size?

Re: LPC18xx LCD Controller SDRAM with DMA

lpcware — Wed, 15 Jun 2016 18:16:54 GMT

Content originally posted in LPCWare by MX21 on Fri Feb 12 12:55:24 MST 2016
I'm doing small transfers of about 3KB at a time. Is that too large?

Re: LPC18xx LCD Controller SDRAM with DMA

lpcware — Wed, 15 Jun 2016 18:16:55 GMT

Content originally posted in LPCWare by arw on Mon Feb 15 08:14:06 MST 2016
Hello MX21,

There is not an immediate answer to say what size of DMA transfer is correct. It depends on your system: display resolution, color depth, frame rate, how often you transfer from SRAM to SDRAM, etc.

There is only one port on the internal bus, for the SDRAM controller. If multiple DMAs are active, then they will have to arbitrate which one is able to perform a transfer.

The reason that memcpy works, is because this is operated by the CPU. After the CPU writes one byte/word value from SRAM to SDRAM, the LCD DMA has time to master the bus for larger transfers from SDRAM to the display.

I would recommend to start the SRAM to SDRAM transfers as small as possible, say 256 bytes in multiple DMA cycles, and then work up to see the right balance for your system.

-arw

Re: LPC18xx LCD Controller SDRAM with DMA

lpcware — Wed, 15 Jun 2016 18:16:56 GMT

Content originally posted in LPCWare by MX21 on Mon Feb 22 10:22:39 MST 2016
Ok, thanks. About 320 bytes did the trick. Anything much beyond that holds off the LCD controller too long.