<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC MicrocontrollersのトピックRe: LPC1820 and I2S interfaces</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1820-and-I2S-interfaces/m-p/528529#M9635</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bavarian on Fri Sep 26 04:42:21 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Well, the concept to configure one as master, providing the clock to the other block which is configured as slave should do the job.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;There is no built-in mechanism between I2S0 and I2S1 for getting a phase synchronous operation.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NXP Support Team.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:17:21 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:17:21Z</dc:date>
    <item>
      <title>LPC1820 and I2S interfaces</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1820-and-I2S-interfaces/m-p/528528#M9634</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by vdelabouere on Tue Sep 23 14:24:18 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have a LPC1820 based design that is using both I2S0 and I2S1 interfaces for audio codec connections. So I have 2 stereo out and 2 stereo in.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Currently one CODEC is connected to I2S0 clock signals and the other one is connected to I2S1 clock signals.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I declared I2S0 and I2S1 as master (they provide the clocks to the codecs).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;How can I make sure that I2S0 and I2S1 clocks are fully in synch ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Do I need to declare I2S1 as a slave interface and feed some I2S0 clocks into the I2S1 ones ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Or is there any internal LPC settings that will guarantee this synchronization ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Vincent&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:17:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1820-and-I2S-interfaces/m-p/528528#M9634</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:17:20Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1820 and I2S interfaces</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1820-and-I2S-interfaces/m-p/528529#M9635</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bavarian on Fri Sep 26 04:42:21 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Well, the concept to configure one as master, providing the clock to the other block which is configured as slave should do the job.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;There is no built-in mechanism between I2S0 and I2S1 for getting a phase synchronous operation.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NXP Support Team.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:17:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1820-and-I2S-interfaces/m-p/528529#M9635</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:17:21Z</dc:date>
    </item>
  </channel>
</rss>

