<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: UART address detect mode in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/UART-address-detect-mode/m-p/526561#M9191</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by EdizonTN on Fri Apr 17 13:02:49 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi support's guy and all others,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Yes, I modified LPC_UART structure (uart_15xx.h) from this:&lt;/SPAN&gt;&lt;BR /&gt;&lt;DIV class="j-rte-table"&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca" style="border:1px solid black;background-color:#cacaca;"&gt; &lt;PRE&gt;/**
 * @brief UART register block structure
 */
typedef struct {
__IO uint32_t&amp;nbsp; CFG;/*!&amp;lt; Configuration register */
__IO uint32_t&amp;nbsp; CTRL;/*!&amp;lt; Control register */
__IO uint32_t&amp;nbsp; STAT;/*!&amp;lt; Status register */
__IO uint32_t&amp;nbsp; INTENSET;/*!&amp;lt; Interrupt Enable read and set register */
__O&amp;nbsp; uint32_t&amp;nbsp; INTENCLR;/*!&amp;lt; Interrupt Enable clear register */
__I&amp;nbsp; uint32_t&amp;nbsp; RXDATA;/*!&amp;lt; Receive Data register */
__I&amp;nbsp; uint32_t&amp;nbsp; RXDATA_STAT;/*!&amp;lt; Receive Data with status register */
__IO uint32_t&amp;nbsp; TXDATA;/*!&amp;lt; Transmit data register */
__IO uint32_t&amp;nbsp; BRG;/*!&amp;lt; Baud Rate Generator register */
__IO uint32_t&amp;nbsp; INTSTAT;/*!&amp;lt; Interrupt status register */
} LPC_USART_T;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;to this:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV class="j-rte-table"&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca" style="border:1px solid black;background-color:#cacaca;"&gt; &lt;PRE&gt;**
 * @brief UART register block structure
 */
typedef struct {
__IO uint32_t&amp;nbsp; CFG;/*!&amp;lt; Configuration register */
__IO uint32_t&amp;nbsp; CTRL;/*!&amp;lt; Control register */
__IO uint32_t&amp;nbsp; STAT;/*!&amp;lt; Status register */
__IO uint32_t&amp;nbsp; INTENSET;/*!&amp;lt; Interrupt Enable read and set register */
__O&amp;nbsp; uint32_t&amp;nbsp; INTENCLR;/*!&amp;lt; Interrupt Enable clear register */
__I&amp;nbsp; uint32_t&amp;nbsp; RXDATA;/*!&amp;lt; Receive Data register */
__I&amp;nbsp; uint32_t&amp;nbsp; RXDATA_STAT;/*!&amp;lt; Receive Data with status register */
__IO uint32_t&amp;nbsp; TXDATA;/*!&amp;lt; Transmit data register */
__IO uint32_t&amp;nbsp; BRG;/*!&amp;lt; Baud Rate Generator register */
__IO uint32_t&amp;nbsp; INTSTAT;/*!&amp;lt; Interrupt status register */

__IO uint32_t&amp;nbsp; OSR;/*!&amp;lt; Oversample selection register */
__IO uint32_t&amp;nbsp; ADDR;/*!&amp;lt; Address match register */
} LPC_USART_T;
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This two missing registers brings error in peripherial view of UART1 and UART2 in LPCXpresso also! You can try it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;btw: what is right name: UART or USART??&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Next, I added a bit definition for Automatic address matching enable:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#define UART_CFG_AUTOADDR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x01 &amp;lt;&amp;lt; 19)/*!&amp;lt; Automatic Address matching enable */&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;-this is not a big mistake, this is only for my idea for next release of CMSIS library....&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now, 9-bit communication working perfectly in my board.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In attachment, you can find modified uart_15xx.h header file.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 17:04:15 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T17:04:15Z</dc:date>
    <item>
      <title>UART address detect mode</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/UART-address-detect-mode/m-p/526559#M9189</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by EdizonTN on Tue Apr 07 00:39:33 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi, &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have to use UART1 with address detection mode (LPC1549).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I found bit definition UART_CTRL_ADDRDET (Address detect mode) in uart15xx.h but a cannot find ADDR register (location 0x4004 402C for UASRT1).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;How to I set address register? Write to 0x4004 402C directly?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:04:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/UART-address-detect-mode/m-p/526559#M9189</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:04:14Z</dc:date>
    </item>
    <item>
      <title>Re: UART address detect mode</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/UART-address-detect-mode/m-p/526560#M9190</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by nerd herd on Fri Apr 17 08:52:00 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi EdizonTN,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am looking at the LPC15xx LPCOpen code base and it seems like you have discovered a bug for us! There are two missing UART registers that are not defined in the LPC_USART_T structure (OSR and ADR). Unless you add those two registers into the structure yourself, yes, it looks like you will have to address the register directly with a volatile integer pointer.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:04:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/UART-address-detect-mode/m-p/526560#M9190</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:04:15Z</dc:date>
    </item>
    <item>
      <title>Re: UART address detect mode</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/UART-address-detect-mode/m-p/526561#M9191</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by EdizonTN on Fri Apr 17 13:02:49 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi support's guy and all others,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Yes, I modified LPC_UART structure (uart_15xx.h) from this:&lt;/SPAN&gt;&lt;BR /&gt;&lt;DIV class="j-rte-table"&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca" style="border:1px solid black;background-color:#cacaca;"&gt; &lt;PRE&gt;/**
 * @brief UART register block structure
 */
typedef struct {
__IO uint32_t&amp;nbsp; CFG;/*!&amp;lt; Configuration register */
__IO uint32_t&amp;nbsp; CTRL;/*!&amp;lt; Control register */
__IO uint32_t&amp;nbsp; STAT;/*!&amp;lt; Status register */
__IO uint32_t&amp;nbsp; INTENSET;/*!&amp;lt; Interrupt Enable read and set register */
__O&amp;nbsp; uint32_t&amp;nbsp; INTENCLR;/*!&amp;lt; Interrupt Enable clear register */
__I&amp;nbsp; uint32_t&amp;nbsp; RXDATA;/*!&amp;lt; Receive Data register */
__I&amp;nbsp; uint32_t&amp;nbsp; RXDATA_STAT;/*!&amp;lt; Receive Data with status register */
__IO uint32_t&amp;nbsp; TXDATA;/*!&amp;lt; Transmit data register */
__IO uint32_t&amp;nbsp; BRG;/*!&amp;lt; Baud Rate Generator register */
__IO uint32_t&amp;nbsp; INTSTAT;/*!&amp;lt; Interrupt status register */
} LPC_USART_T;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;to this:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV class="j-rte-table"&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca" style="border:1px solid black;background-color:#cacaca;"&gt; &lt;PRE&gt;**
 * @brief UART register block structure
 */
typedef struct {
__IO uint32_t&amp;nbsp; CFG;/*!&amp;lt; Configuration register */
__IO uint32_t&amp;nbsp; CTRL;/*!&amp;lt; Control register */
__IO uint32_t&amp;nbsp; STAT;/*!&amp;lt; Status register */
__IO uint32_t&amp;nbsp; INTENSET;/*!&amp;lt; Interrupt Enable read and set register */
__O&amp;nbsp; uint32_t&amp;nbsp; INTENCLR;/*!&amp;lt; Interrupt Enable clear register */
__I&amp;nbsp; uint32_t&amp;nbsp; RXDATA;/*!&amp;lt; Receive Data register */
__I&amp;nbsp; uint32_t&amp;nbsp; RXDATA_STAT;/*!&amp;lt; Receive Data with status register */
__IO uint32_t&amp;nbsp; TXDATA;/*!&amp;lt; Transmit data register */
__IO uint32_t&amp;nbsp; BRG;/*!&amp;lt; Baud Rate Generator register */
__IO uint32_t&amp;nbsp; INTSTAT;/*!&amp;lt; Interrupt status register */

__IO uint32_t&amp;nbsp; OSR;/*!&amp;lt; Oversample selection register */
__IO uint32_t&amp;nbsp; ADDR;/*!&amp;lt; Address match register */
} LPC_USART_T;
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This two missing registers brings error in peripherial view of UART1 and UART2 in LPCXpresso also! You can try it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;btw: what is right name: UART or USART??&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Next, I added a bit definition for Automatic address matching enable:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#define UART_CFG_AUTOADDR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x01 &amp;lt;&amp;lt; 19)/*!&amp;lt; Automatic Address matching enable */&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;-this is not a big mistake, this is only for my idea for next release of CMSIS library....&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now, 9-bit communication working perfectly in my board.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In attachment, you can find modified uart_15xx.h header file.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:04:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/UART-address-detect-mode/m-p/526561#M9191</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:04:15Z</dc:date>
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  </channel>
</rss>

