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    <title>topic Re: Booting from SPIFI and then shutting down the automatic memory fetches from SPIFI in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525753#M8389</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by diederichs on Sat Feb 16 11:20:31 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I need some help with the SPIFI on the LPC4357.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;We have a project that has an advanced Boot Loader executing from SPIFI.&amp;nbsp; The Boot Loader in our project is capable of distributing firmware images to several areas including other sections of the SPIFI, IROM and other external devices.&amp;nbsp; We are now attempting to have the Boot Loader update itself.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;We already have a scatter file that places all of the Boot Loader application code into SRAM and we are successfully executing from there.&amp;nbsp; We can successfully erase the SPIFI section containing the Boot Loader startup code and continue to execute.&amp;nbsp; However, because the spifi_drv_M4.lib requires ARM ABI compatibility the attempt to write the new code using the spifi_program (SPIFIobj *obj, char *source, SPIFIopers *opers) crashes.&amp;nbsp; Inside the spifi_program() call, it hangs on an attempt to execute __aeabi_memcpy4 which of course is no longer there.&amp;nbsp; Just to absolutely clear here… our scatter file places spifi_drv_M4.lib in SRAM but the compiler has placed ABI commands in the startup ROM (spifi) after the code from our startup_LPC43xx.s file.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;To attempt to get around this problem I have tried to enforce the relocating of all ABI functions to SRAM but have failed to figure out how to do it.&amp;nbsp; I repeat that we have already placed the spifi_drv_M4.lib in SRAM.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have also attempted to write to the SPIFI in command mode using the register definitions provided in Rev. 1.6 of the user manual.&amp;nbsp; Here is my attempt:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;static SPIFIobj obj; // The SPIFI interface is configured by the provided library prior to calling this function.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;int spifi_flash_ProgramBootLoader (unsigned int adr, unsigned int sz, unsigned char *buf)&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned int Fail = 0;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned int Command;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned int * d = (unsigned int *)buf;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Limit the Size to a single page.&amp;nbsp; Limited to 512 on our Spansion flash using command code 0x38. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sz &amp;gt; 512) return 1;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Write a reset to the status register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; *(unsigned int volatile *)0x4000301C |= 0x10;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Wait for hardware to be ready for command.&amp;nbsp; It will clear the Reset bit.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (*(unsigned int volatile *)0x4000301C &amp;amp; 0x10);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Change to command mode.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Write the address to the SPIFI address register&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; *(unsigned int volatile *)0x40003008 = adr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Create the command word.&amp;nbsp; Obj is configured prior to this call using the spifi_init().&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // It chose a command word of obj.prog_cmd = 0x38B008000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Command = obj.prog_cmd;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Command |= sz;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; *(unsigned int volatile *)0x40003004 = Command;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Write the bytes to the SPIFI data register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (sz--) *(unsigned int volatile *)0x40003014 = *buf++;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Read the status until command complete.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (*(unsigned int volatile *)0x4000301C &amp;amp; 0x10);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Set SPIFI back to Memory Mode.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Fail |= spifi_init(&amp;amp;obj, 3, S_RCVCLK | S_FULLCLK, 32);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; return(Fail);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;We have tried a couple variations on this theme (including writing bytes and words to the SPIFI data register).&amp;nbsp; None of the attempts has modified the SPIFI Flash contents.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Help is greatly appreciated.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:14:05 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:14:05Z</dc:date>
    <item>
      <title>Booting from SPIFI and then shutting down the automatic memory fetches from SPIFI</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525751#M8387</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by belzurkur on Wed Aug 15 16:07:48 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have a project based on the bootfast example, where a custom scatter file is used to locate everything to SRAM.&amp;nbsp; I have added moving the interrupt vectors to SRAM and changed the VTOR register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The image boots fine via SPIFI, but now that the program is running in SRAM I would like to re-purpose the SPIFI for another use.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I cannot determine how to shut down the automatic memory mapping of SPIFI from the boot stage.&amp;nbsp; Any interruption of the SPIFI signals or clocks creates a hard-fault exception.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Any help you can provide is appreciated.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:14:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525751#M8387</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:14:04Z</dc:date>
    </item>
    <item>
      <title>Re: Booting from SPIFI and then shutting down the automatic memory fetches from SPIFI</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525752#M8388</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by belzurkur on Thu Aug 16 15:05:14 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Resolved.&amp;nbsp; Make sure your scatter file locates all library function in SRAM as well.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:14:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525752#M8388</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:14:04Z</dc:date>
    </item>
    <item>
      <title>Re: Booting from SPIFI and then shutting down the automatic memory fetches from SPIFI</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525753#M8389</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by diederichs on Sat Feb 16 11:20:31 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I need some help with the SPIFI on the LPC4357.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;We have a project that has an advanced Boot Loader executing from SPIFI.&amp;nbsp; The Boot Loader in our project is capable of distributing firmware images to several areas including other sections of the SPIFI, IROM and other external devices.&amp;nbsp; We are now attempting to have the Boot Loader update itself.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;We already have a scatter file that places all of the Boot Loader application code into SRAM and we are successfully executing from there.&amp;nbsp; We can successfully erase the SPIFI section containing the Boot Loader startup code and continue to execute.&amp;nbsp; However, because the spifi_drv_M4.lib requires ARM ABI compatibility the attempt to write the new code using the spifi_program (SPIFIobj *obj, char *source, SPIFIopers *opers) crashes.&amp;nbsp; Inside the spifi_program() call, it hangs on an attempt to execute __aeabi_memcpy4 which of course is no longer there.&amp;nbsp; Just to absolutely clear here… our scatter file places spifi_drv_M4.lib in SRAM but the compiler has placed ABI commands in the startup ROM (spifi) after the code from our startup_LPC43xx.s file.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;To attempt to get around this problem I have tried to enforce the relocating of all ABI functions to SRAM but have failed to figure out how to do it.&amp;nbsp; I repeat that we have already placed the spifi_drv_M4.lib in SRAM.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have also attempted to write to the SPIFI in command mode using the register definitions provided in Rev. 1.6 of the user manual.&amp;nbsp; Here is my attempt:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;static SPIFIobj obj; // The SPIFI interface is configured by the provided library prior to calling this function.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;int spifi_flash_ProgramBootLoader (unsigned int adr, unsigned int sz, unsigned char *buf)&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned int Fail = 0;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned int Command;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned int * d = (unsigned int *)buf;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Limit the Size to a single page.&amp;nbsp; Limited to 512 on our Spansion flash using command code 0x38. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (sz &amp;gt; 512) return 1;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Write a reset to the status register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; *(unsigned int volatile *)0x4000301C |= 0x10;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Wait for hardware to be ready for command.&amp;nbsp; It will clear the Reset bit.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (*(unsigned int volatile *)0x4000301C &amp;amp; 0x10);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Change to command mode.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Write the address to the SPIFI address register&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; *(unsigned int volatile *)0x40003008 = adr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Create the command word.&amp;nbsp; Obj is configured prior to this call using the spifi_init().&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // It chose a command word of obj.prog_cmd = 0x38B008000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Command = obj.prog_cmd;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Command |= sz;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; *(unsigned int volatile *)0x40003004 = Command;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Write the bytes to the SPIFI data register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (sz--) *(unsigned int volatile *)0x40003014 = *buf++;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Read the status until command complete.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (*(unsigned int volatile *)0x4000301C &amp;amp; 0x10);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Set SPIFI back to Memory Mode.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Fail |= spifi_init(&amp;amp;obj, 3, S_RCVCLK | S_FULLCLK, 32);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; return(Fail);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;We have tried a couple variations on this theme (including writing bytes and words to the SPIFI data register).&amp;nbsp; None of the attempts has modified the SPIFI Flash contents.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Help is greatly appreciated.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:14:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525753#M8389</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:14:05Z</dc:date>
    </item>
    <item>
      <title>Re: Booting from SPIFI and then shutting down the automatic memory fetches from SPIFI</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525754#M8390</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by uratan on Mon Feb 18 01:54:10 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi, I am trying LPC1830-Xplorer,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;and had written my-bootloader/monitor for myself.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I think __aeabi_memcpy4() function is not included in the&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;spifi_drv_M4.lib, it may come from another library.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Because it is not found on my gcc-4.7.1 (yagarto) environment.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;(the library I used is spifi_drv_M3.lib)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If your linker does not complain, __aeabi_memcpy4() is linked from&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;somewhere, and the unknown library may use some special section name.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; (on gcc, unspecified section is linked as the linker like)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If you write __aeabi_memcpy4() in somewhere in you source code,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;this local function may be prior to the library,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;so your __aeabi_memcpy4() may be used instead of it in the unknown library.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I had written it by myself because my gcc does not have it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;If you are interested in, do:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;&amp;nbsp; visit &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww002.upp.so-net.ne.jp%2Furatan%2Fxplr%2Fendex.html" rel="nofollow" target="_blank"&gt;http://www002.upp.so-net.ne.jp/uratan/xplr/endex.html&lt;/A&gt;&lt;SPAN&gt;,&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; get minimon-012.zip,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; see spifi.c.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;my __aeabi_memcpy4() is written in it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; (Mon Feb 18 17:52:35 JST 2013)&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:14:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525754#M8390</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:14:06Z</dc:date>
    </item>
    <item>
      <title>Re: Booting from SPIFI and then shutting down the automatic memory fetches from SPIFI</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525755#M8391</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by diederichs on Tue Feb 19 10:48:32 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for the direction.&amp;nbsp; I have learned that the __aeabi_memcpy4 function is the same as the ANSI C version with the exception that the return value is void.&amp;nbsp; The “4” indicates that it is assumed that the pointers are word (4-btype) aligned.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Following your lead, I created my own version of __aeabi_memcpy4 which is located in SRAM and all is well.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void __aeabi_memcpy4(void *dest, const void *src, unsigned int n)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned char * s = (unsigned char *)src;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; unsigned char * d = (unsigned char *)dest;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while (n--) *d++ = *s++;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks Uratan.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:14:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Booting-from-SPIFI-and-then-shutting-down-the-automatic-memory/m-p/525755#M8391</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:14:06Z</dc:date>
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