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    <title>topic Re: LPC1317 usart register, 2 diff regsiters having same address in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1317-usart-register-2-diff-regsiters-having-same-address/m-p/525504#M8140</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by NXP_Paul on Wed Aug 28 06:11:16 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Your understanding is correct.&amp;nbsp; The register access will depend upon the status of DLAB.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Please see the LPC13xx UART examples that can be found at:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fnode%2F11538%2F78" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/node/11538/78&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 16:54:40 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T16:54:40Z</dc:date>
    <item>
      <title>LPC1317 usart register, 2 diff regsiters having same address</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1317-usart-register-2-diff-regsiters-having-same-address/m-p/525503#M8139</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by aamir ali on Wed Aug 28 03:16:57 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;In usart how can 2 different registers share same address.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1.&amp;nbsp; RBR,THR,DLL share same address. RBR &amp;amp; THR can be same like as they are buffer register but DLL has different functin. How can it share address. Or it the function of DLAB bit which make changes ion hardware register on when a regsiter will be accessed. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;So if DLAB = 0 &amp;amp; read then RBR&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; if DLAB = 0 &amp;amp; write then THR&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; if DLAB = 1 &amp;amp; r/w then DLL.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;2. Or same goes for ( DLM &amp;amp; IER ) &amp;amp; ( IIR &amp;amp; FCR ).&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:54:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1317-usart-register-2-diff-regsiters-having-same-address/m-p/525503#M8139</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:54:39Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1317 usart register, 2 diff regsiters having same address</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1317-usart-register-2-diff-regsiters-having-same-address/m-p/525504#M8140</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by NXP_Paul on Wed Aug 28 06:11:16 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Your understanding is correct.&amp;nbsp; The register access will depend upon the status of DLAB.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Please see the LPC13xx UART examples that can be found at:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fnode%2F11538%2F78" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/node/11538/78&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:54:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1317-usart-register-2-diff-regsiters-having-same-address/m-p/525504#M8140</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:54:40Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1317 usart register, 2 diff regsiters having same address</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1317-usart-register-2-diff-regsiters-having-same-address/m-p/525505#M8141</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by greenemily on Thu Oct 24 22:02:44 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you very much for the writeup. I agree with what you say. I have been talking about this subject a lot lately with my brother so hopefully it will be to see him. my point of view&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://http://hotelsbookingparis.wordpress.com/2013/10/24/la-paz-tourist-guide/"&gt;best hotel deals&lt;/A&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:54:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1317-usart-register-2-diff-regsiters-having-same-address/m-p/525505#M8141</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:54:40Z</dc:date>
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