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    <title>LPC MicrocontrollersのトピックDeep Sleep Question</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Deep-Sleep-Question/m-p/525396#M8032</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pbjoseph1 on Fri Sep 25 15:39:17 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I was wondering whether boot is required in the NXP LPC 18xx series.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I see that 8K of SRAM is preserved as are logic states.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;What the implications for OS recovery are in that case?&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:14:30 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:14:30Z</dc:date>
    <item>
      <title>Deep Sleep Question</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Deep-Sleep-Question/m-p/525396#M8032</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pbjoseph1 on Fri Sep 25 15:39:17 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I was wondering whether boot is required in the NXP LPC 18xx series.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I see that 8K of SRAM is preserved as are logic states.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;What the implications for OS recovery are in that case?&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:14:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Deep-Sleep-Question/m-p/525396#M8032</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:14:30Z</dc:date>
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    <item>
      <title>Re: Deep Sleep Question</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Deep-Sleep-Question/m-p/525397#M8033</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mc on Tue Sep 29 06:35:33 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In deep sleep mode, all RAM banks, as well as both flash banks will remain powered. So your OS contexts will be saved. Please note that when LPC18xx is forced into&amp;nbsp; deep sleep mode, clock source will be IRC. &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:14:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Deep-Sleep-Question/m-p/525397#M8033</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:14:31Z</dc:date>
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