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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: Unable to get IAP working with LPC1853 in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525391#M8027</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by fcarlo on Thu Nov 22 01:35:39 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you for pointing this out.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Now is working properly.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Greetings&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:12:48 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:12:48Z</dc:date>
    <item>
      <title>Unable to get IAP working with LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525388#M8024</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by fcarlo on Tue Nov 20 09:04:28 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi, &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I am struggling to get IAP working with a custom made board that mount a LPC1853 part. I can program this part using ISP DFU and the application provided from NXP. I am working with IAR 6.40.5 compiler and Segger JLINK debugger.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have started from here:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fcontent%2Fblog%2Fapplication-programming-iap-code-example" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/content/blog/application-programming-iap-code-example&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The .ICF (linker file) is set properly to reserve top 32 bytes of RAM as follow:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;// Top 32 bytes are reserved for IAP variables&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;define symbol LOCAL_SRAM_start__&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x10080000;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;define symbol LOCAL_SRAM_end__&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x10089FDF;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;define region LOCAL_SRAM_region&amp;nbsp;&amp;nbsp;&amp;nbsp; = mem:[from LOCAL_SRAM_start__&amp;nbsp; to&amp;nbsp; LOCAL_SRAM_end__];&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Command parameter table and command result table are placed at a fixed address:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;static unsigned int iapCommands[6] @ 0x10080000; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;static unsigned int iapResults[4]&amp;nbsp; @ 0x10080018;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The IAP invoke call is located in the jump table as follows:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;#define IAP_LOCATION 0x10400100&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;typedef void (__thumb *IAP)(unsigned int[], unsigned int[]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;const static IAP iap_entry = (IAP)IAP_LOCATION;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;To keep thing as simple as possibile, I am only trying to send an "IAP_INIT (49)" command and looking for a CMD_SUCCESS response.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;__disable_interrupt();&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;iapCommands[0] = (unsigned int)IAP_INIT;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;iap_entry(iapCommands, iapResults);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;ret = iapResults[0];&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;__enable_interrupt();&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;if (ret != CMD_SUCCESS) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; /*Cmd failed*/&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; return((uint32_t)-1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;When IAP is called, I can see from via JTAG that the registers are properly set:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;R0: 0x10080000 //&amp;amp;iapCommands[0]&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;R1: 0x10080018 //&amp;amp;iapResults[0]&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;R2: 0x10400100 //IAP ROM driver table&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;From the disassembly listing I can see the jump command to the address:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;BLX R2&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After that some assembly instructions are done and at some point the processor goes to the Hardware Fault ISR before reaching the instruction:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;ret = iapResults[0];&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is there someone that could tell me if I made something wrong or misunderstood something from the User Manual?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:12:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525388#M8024</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:12:45Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get IAP working with LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525389#M8025</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by fcarlo on Wed Nov 21 03:59:06 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I have replaced the default HardFault handler with this one:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void HardFault_Handler(void) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; __ASM("TST LR, #4");&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; __ASM("ITE EQ");&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; __ASM("MRSEQ R0, MSP");&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; __ASM("MRSNE R0, PSP");&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; __ASM("B hard_fault_handler_c");&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;// From Joseph Yiu, minor edits by fcarlo&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;// hard fault handler in C,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;// with stack frame location as input parameter&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;// called from HardFault_Handler in file xxx.s&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;void hard_fault_handler_c(unsigned int * hardfault_args) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_r0;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_r1;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_r2;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_r3;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_r12;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_lr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_pc;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_psr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_bfar;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_cfsr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_hfsr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_dfsr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_afsr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; unsigned int stacked_scb_shcsr;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_r0 = ((unsigned long) hardfault_args[0]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_r1 = ((unsigned long) hardfault_args[1]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_r2 = ((unsigned long) hardfault_args[2]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_r3 = ((unsigned long) hardfault_args[3]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_r12 = ((unsigned long) hardfault_args[4]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_lr = ((unsigned long) hardfault_args[5]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_pc = ((unsigned long) hardfault_args[6]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_psr = ((unsigned long) hardfault_args[7]);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_bfar = (*((volatile unsigned long *)(0xE000ED38)));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_cfsr = (*((volatile unsigned long *)(0xE000ED28)));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_hfsr = (*((volatile unsigned long *)(0xE000ED2C)));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_dfsr = (*((volatile unsigned long *)(0xE000ED30)));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_afsr = (*((volatile unsigned long *)(0xE000ED3C)));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; stacked_scb_shcsr = SCB-&amp;gt;SHCSR;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("\n\n[Hard fault handler - all numbers in hex]\n");&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("R0 = %x\n", stacked_r0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("R1 = %x\n", stacked_r1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("R2 = %x\n", stacked_r2);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("R3 = %x\n", stacked_r3);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("R12 = %x\n", stacked_r12);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("LR [R14] = %x&amp;nbsp; subroutine call return address\n", stacked_lr);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("PC [R15] = %x&amp;nbsp; program counter\n", stacked_pc);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("PSR = %x\n", stacked_psr);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("BFAR = %x\n", (*((volatile unsigned long *)(0xE000ED38))));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("CFSR = %x\n", (*((volatile unsigned long *)(0xE000ED28))));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("HFSR = %x\n", (*((volatile unsigned long *)(0xE000ED2C))));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("DFSR = %x\n", (*((volatile unsigned long *)(0xE000ED30))));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("AFSR = %x\n", (*((volatile unsigned long *)(0xE000ED3C))));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; printf ("SCB_SHCSR = %x\n", SCB-&amp;gt;SHCSR);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; while (1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;And this is the output:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;R0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;R1&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x100826FB&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;R2&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x10400100&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;R3&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x40050004&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;R12&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x40050044&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LR [R14]&amp;nbsp; = 0x1A001E3F&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PC [R15]&amp;nbsp; = 0x1040012A&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;PSR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x41000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;BFAR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0xE000ED38&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CFSR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x00000400&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;HFSR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x40000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;DFSR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;AFSR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SCB_SHCSR = 0&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I can't do step-by-step debugging with Segger J-link after the jump to the ROM API address (0x10400100) so I can't understand exactly what could be the problem.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I forgot to mention that I am currently using an external oscillator and PLL1 is enabled to run at 60 MHz.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:12:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525389#M8025</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:12:46Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get IAP working with LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525390#M8026</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DF9DQ on Wed Nov 21 11:11:32 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;0x10400100 is not the IAP entry point. Rather this word location holds the &amp;lt;i&amp;gt;pointer&amp;lt;/i&amp;gt; to the IAP entry point!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;code&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;iap_entry = *((IAP *)0x10400100);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;iap_entry(...);&amp;nbsp; /* Jumps to 0x10408580 */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/code&amp;gt;&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:12:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525390#M8026</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:12:47Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get IAP working with LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525391#M8027</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by fcarlo on Thu Nov 22 01:35:39 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you for pointing this out.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Now is working properly.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Greetings&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:12:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525391#M8027</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:12:48Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get IAP working with LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525392#M8028</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by nxp21346 on Wed Nov 28 17:57:00 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Also... make sure to have enough stack space available, especially if you plan to call Set active boot flash bank. That command requires 2208 bytes of stack.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;-Dave @ NXP &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:12:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525392#M8028</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:12:48Z</dc:date>
    </item>
    <item>
      <title>Re: Unable to get IAP working with LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525393#M8029</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dave, how would one reserve 2208 bytes for this "Set Active boot flash bank" command?&amp;nbsp; Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 Feb 2018 19:17:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unable-to-get-IAP-working-with-LPC1853/m-p/525393#M8029</guid>
      <dc:creator>hiephuynh</dc:creator>
      <dc:date>2018-02-28T19:17:39Z</dc:date>
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