topic UM10524 and LPCXpresso have incorrect/inconsistent documention for GPIO Pin Interrupt Select Register in LPC Microcontrollers https://community.nxp.com/t5/LPC-Microcontrollers/UM10524-and-LPCXpresso-have-incorrect-inconsistent-documention/m-p/525365#M8001 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by mathseng on Fri Jul 17 00:40:35 MST 2015</STRONG><BR /><SPAN>UM10524 - LPC1315-16-17-45-46-47.pdf</SPAN><BR /><BR /><SPAN>Section: 3.5.30 GPIO Pin Interrupt Select register (PINTSEL0 to 7) (page 27/416)</SPAN><BR /><SPAN>a. Table 35 appears incorrect.</SPAN><BR /><SPAN>b. LPCXpresso Debug IDE display is inconsistent with entered data.</SPAN><BR /><BR /><SPAN>Documentation refers to pins 0..23 from port 0 and 24..55 from port 1</SPAN><BR /><SPAN>Actual setup is consistent with documentation from UM10462 3.5.33 Pin interrupt select registers (page 35/495)</SPAN><BR /><BR /><SPAN>I am unable to check PIO0.23 and PIO1.0, since I am using 33/48 pin devices, but programming these shows in the DebugIDE as 0/x17, 0/x18</SPAN><BR /><BR /><SPAN>Proven:</SPAN><BR /><SPAN>PIO0.2 shows as 0x02 in PINTSEL register, appears as Port 0, 0x02 in DebugIDE, and correctly operates as PIO0.2 in chip operation.</SPAN><BR /><SPAN>PIO1.26 shows as 0x32 in PINTSEL register, and appears as Port 1, 0x12 in DebugIDE</SPAN><BR /><SPAN>PIO1.20 shows as 0x2C in PINTSEL register, and appears as Port 1, 0x0c in DebugIDE, and correctly operates as PIO1.20 in chip operation</SPAN><BR /><BR /></BODY></HTML> Wed, 15 Jun 2016 16:54:48 GMT lpcware 2016-06-15T16:54:48Z UM10524 and LPCXpresso have incorrect/inconsistent documention for GPIO Pin Interrupt Select Register https://community.nxp.com/t5/LPC-Microcontrollers/UM10524-and-LPCXpresso-have-incorrect-inconsistent-documention/m-p/525365#M8001 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by mathseng on Fri Jul 17 00:40:35 MST 2015</STRONG><BR /><SPAN>UM10524 - LPC1315-16-17-45-46-47.pdf</SPAN><BR /><BR /><SPAN>Section: 3.5.30 GPIO Pin Interrupt Select register (PINTSEL0 to 7) (page 27/416)</SPAN><BR /><SPAN>a. Table 35 appears incorrect.</SPAN><BR /><SPAN>b. LPCXpresso Debug IDE display is inconsistent with entered data.</SPAN><BR /><BR /><SPAN>Documentation refers to pins 0..23 from port 0 and 24..55 from port 1</SPAN><BR /><SPAN>Actual setup is consistent with documentation from UM10462 3.5.33 Pin interrupt select registers (page 35/495)</SPAN><BR /><BR /><SPAN>I am unable to check PIO0.23 and PIO1.0, since I am using 33/48 pin devices, but programming these shows in the DebugIDE as 0/x17, 0/x18</SPAN><BR /><BR /><SPAN>Proven:</SPAN><BR /><SPAN>PIO0.2 shows as 0x02 in PINTSEL register, appears as Port 0, 0x02 in DebugIDE, and correctly operates as PIO0.2 in chip operation.</SPAN><BR /><SPAN>PIO1.26 shows as 0x32 in PINTSEL register, and appears as Port 1, 0x12 in DebugIDE</SPAN><BR /><SPAN>PIO1.20 shows as 0x2C in PINTSEL register, and appears as Port 1, 0x0c in DebugIDE, and correctly operates as PIO1.20 in chip operation</SPAN><BR /><BR /></BODY></HTML> Wed, 15 Jun 2016 16:54:48 GMT https://community.nxp.com/t5/LPC-Microcontrollers/UM10524-and-LPCXpresso-have-incorrect-inconsistent-documention/m-p/525365#M8001 lpcware 2016-06-15T16:54:48Z