topic Re: PWM can't be set to 0% duty cycle in LPC Microcontrollers

PWM can't be set to 0% duty cycle

lpcware — Wed, 15 Jun 2016 18:11:49 GMT

Content originally posted in LPCWare by giusloq on Fri Apr 17 02:06:40 MST 2015
I'm able to configure and use the PWM output with whatever duty cycle, except 0%, i.e. setting the output always low.

In datasheet (LPC1769) is written:

Quote:
24.4.1 Rules for Single Edge Controlled PWM Outputs
[list=1]
[*]All single edge controlled PWM outputs go high at the beginning of a PWM cycle unless their match value is equal to 0.
[*]Each PWM output will go low when its match value is reached. If no match occurs (i.e. the match value is greater than the PWM rate), the PWM output remains continuously high.
[/list]

I set MR2 to 0 (it's the second channel of PWM1 on pin 3.25 of LPC1769), but the pin stays stable high. Why?

I know I can configure the pin as GPIO when the duty cycle is 0%, but it's better to use PWM peripherals.

Re: PWM can't be set to 0% duty cycle

lpcware — Wed, 15 Jun 2016 18:11:50 GMT

Content originally posted in LPCWare by R2D2 on Fri Apr 17 02:38:03 MST 2015

Quote: giusloq
Why?

Wrong code :)

Re: PWM can't be set to 0% duty cycle

lpcware — Wed, 15 Jun 2016 18:11:50 GMT

Content originally posted in LPCWare by giusloq on Fri Apr 17 02:51:03 MST 2015

#include "chip.h"
#define PIN_PWM3, 25
#define LPC_PWM1          ((LPC_PWM_T            *) LPC_PWM1_BASE)

Chip_PWM_Init(LPC_PWM1);
Chip_IOCON_PinMuxSet(LPC_IOCON, PIN_PWM, IOCON_MODE_INACT | IOCON_FUNC3);/* PWM1[2] */
Chip_PWM_PrescaleSet(LPC_PWM1, 1000);
Chip_PWM_SetControlMode(LPC_PWM1, 2, PWM_SINGLE_EDGE_CONTROL_MODE, PWM_OUT_ENABLED);
Chip_PWM_SetMatch(LPC_PWM1, 0, 100);
Chip_PWM_SetMatch(LPC_PWM1, 2, 0);
Chip_PWM_Enable(LPC_PWM1);

I'm using the libraries found here. I only changed Chip_Pwm_GetClockIndex() in pwm_17xx_40xx.c (the original code uses PWM0 peripheral too that is absent in LPC1769):

/* Returns clock for the peripheral block */
STATIC CHIP_SYSCTL_CLOCK_T Chip_Pwm_GetClockIndex(LPC_PWM_T *pTMR)
{
        CHIP_SYSCTL_CLOCK_T clkTMR;

#ifdef CHIP_LPC177X_8X
        if (pTMR == LPC_PWM0) {
                clkTMR = SYSCTL_CLOCK_PWM0;
        }
        else if (pTMR == LPC_PWM1) {
                clkTMR = SYSCTL_CLOCK_PWM1;
        }
        else {
                clkTMR = SYSCTL_CLOCK_PWM0;
        }
#endif

#ifdef CHIP_LPC175X_6X
        if (pTMR == LPC_PWM1) {
                clkTMR = SYSCTL_CLOCK_PWM1;
        }
        else {
                clkTMR = SYSCTL_CLOCK_PWM1;
        }
#endif

        return clkTMR;
}

Re: PWM can't be set to 0% duty cycle

lpcware — Wed, 15 Jun 2016 18:11:51 GMT

Content originally posted in LPCWare by R2D2 on Fri Apr 17 03:03:40 MST 2015
Could be useful if you post your complete project (if it's LPCXpresso)...

Re: PWM can't be set to 0% duty cycle

lpcware — Wed, 15 Jun 2016 18:11:51 GMT

Content originally posted in LPCWare by R2D2 on Fri Apr 17 03:48:21 MST 2015

Quote: giusloq
I'm using the libraries found here.

And that's the wrong code :exmark:

This library isn't latching Match registers J)

Adding:

....
Chip_PWM_SetMatch(LPC_PWM1, 0, 100);
Chip_PWM_SetMatch(LPC_PWM1, 2, 0);
[color=#f00]LPC_PWM1->LER = (1<<0)|(1<<2);[/color]

should persuade PWM to work as expected

Re: PWM can't be set to 0% duty cycle

lpcware — Wed, 15 Jun 2016 18:11:52 GMT

Content originally posted in LPCWare by giusloq on Fri Apr 17 04:50:15 MST 2015

Quote:
This library isn't latching Match registers J)

Until now, I ignored the latching register. I wonder why it worked well without setting LER bits for all duty cycle values (Match register 2 values), but the single value of 0 :quest:

Thank you very much, my friend.