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    <title>LPC MicrocontrollersのトピックInconsistency in LPCOpen sysinit_15xx.c</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Inconsistency-in-LPCOpen-sysinit-15xx-c/m-p/514540#M754</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by miccio on Thu Sep 17 11:19:21 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello everyone,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I wanted to write my own set of libraries so I looked into the LPCOpen file mentioned in the title and found this:&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
/* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 6 = 72MHz
&amp;nbsp;&amp;nbsp; MSEL = 5 (this is pre-decremented), PSEL = 1 (for P = 2)
&amp;nbsp;&amp;nbsp; FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 6 = 72MHz
&amp;nbsp;&amp;nbsp; FCCO = FCLKOUT * 2 * P = 72MHz * 2 * 2 = 288MHz (within FCCO range) */
Chip_Clock_SetupSystemPLL(5, 2);
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;However, the given values of MSEL and PSEL yield M=6, P=4, which result in a FCCO freq. of 562MHz (therefore beyond its boundaries) for input freq of 12MHz, regardless of it being sourced from the IRC or the XTAL.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;That is, according to UM10736 page76, which actually suggests MSEL and PSEL values of 5 and 1 respectively. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;How can the library functions work if their settings are wrong?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 17:12:50 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T17:12:50Z</dc:date>
    <item>
      <title>Inconsistency in LPCOpen sysinit_15xx.c</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Inconsistency-in-LPCOpen-sysinit-15xx-c/m-p/514540#M754</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by miccio on Thu Sep 17 11:19:21 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello everyone,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I wanted to write my own set of libraries so I looked into the LPCOpen file mentioned in the title and found this:&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
/* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 6 = 72MHz
&amp;nbsp;&amp;nbsp; MSEL = 5 (this is pre-decremented), PSEL = 1 (for P = 2)
&amp;nbsp;&amp;nbsp; FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 6 = 72MHz
&amp;nbsp;&amp;nbsp; FCCO = FCLKOUT * 2 * P = 72MHz * 2 * 2 = 288MHz (within FCCO range) */
Chip_Clock_SetupSystemPLL(5, 2);
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;However, the given values of MSEL and PSEL yield M=6, P=4, which result in a FCCO freq. of 562MHz (therefore beyond its boundaries) for input freq of 12MHz, regardless of it being sourced from the IRC or the XTAL.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;That is, according to UM10736 page76, which actually suggests MSEL and PSEL values of 5 and 1 respectively. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;How can the library functions work if their settings are wrong?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:12:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Inconsistency-in-LPCOpen-sysinit-15xx-c/m-p/514540#M754</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:12:50Z</dc:date>
    </item>
    <item>
      <title>Re: Inconsistency in LPCOpen sysinit_15xx.c</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Inconsistency-in-LPCOpen-sysinit-15xx-c/m-p/514541#M755</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by R2D2 on Thu Sep 17 11:39:06 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;That's a known issue&amp;nbsp; :(( &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.lpcware.com%2Fcontent%2Fforum%2Fbugreport-lpcopen-208c-lpc15xx-configures-pll-incorrectly" rel="nofollow" target="_blank"&gt;https://www.lpcware.com/content/forum/bugreport-lpcopen-208c-lpc15xx-configures-pll-incorrectly&lt;/A&gt;&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:12:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Inconsistency-in-LPCOpen-sysinit-15xx-c/m-p/514541#M755</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:12:51Z</dc:date>
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