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    <title>LPC MicrocontrollersのトピックIAP runs into hard fault</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/IAP-runs-into-hard-fault/m-p/524747#M7383</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Alex on Fri Oct 10 07:00:29 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm using a LPC1776 at 120 MHz clock frequency. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I like to erase a sector of the internal flash via the IAP interface but when I try to call the IAP handler to prepare the sector for write/erase operation a hard fault is raised.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I performed a test with 80 MHz clock frequency and it performed quite well.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Does the boot rom have a clock limitation?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Another thing is that the earse handler always returns busy @ 80 MHz clock. What may the reson be?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Alex &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:08:42 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:08:42Z</dc:date>
    <item>
      <title>IAP runs into hard fault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/IAP-runs-into-hard-fault/m-p/524747#M7383</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Alex on Fri Oct 10 07:00:29 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm using a LPC1776 at 120 MHz clock frequency. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I like to erase a sector of the internal flash via the IAP interface but when I try to call the IAP handler to prepare the sector for write/erase operation a hard fault is raised.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I performed a test with 80 MHz clock frequency and it performed quite well.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Does the boot rom have a clock limitation?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Another thing is that the earse handler always returns busy @ 80 MHz clock. What may the reson be?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Alex &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:08:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/IAP-runs-into-hard-fault/m-p/524747#M7383</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:08:42Z</dc:date>
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