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    <title>topic CMSIS EEPROM_Write in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/CMSIS-EEPROM-Write/m-p/523649#M6285</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Marc Crandall on Tue Feb 14 14:00:39 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Looking at the EEPROM_Write function on the GIT server (for the LPC1788)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I noticed that the address is only being set with the page_offset and not the page_address. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is this a bug or am I missing how this works?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;(Previously you had "LPC_EEPROM-&amp;gt;ADDR = EEPROM_PAGE_ADRESS(page_address)|EEPROM_PAGE_OFFSET(page_offset);")&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;M&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:03:25 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:03:25Z</dc:date>
    <item>
      <title>CMSIS EEPROM_Write</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/CMSIS-EEPROM-Write/m-p/523649#M6285</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Marc Crandall on Tue Feb 14 14:00:39 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Looking at the EEPROM_Write function on the GIT server (for the LPC1788)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I noticed that the address is only being set with the page_offset and not the page_address. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is this a bug or am I missing how this works?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;(Previously you had "LPC_EEPROM-&amp;gt;ADDR = EEPROM_PAGE_ADRESS(page_address)|EEPROM_PAGE_OFFSET(page_offset);")&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;M&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:03:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/CMSIS-EEPROM-Write/m-p/523649#M6285</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:03:25Z</dc:date>
    </item>
    <item>
      <title>Re: CMSIS EEPROM_Write</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/CMSIS-EEPROM-Write/m-p/523650#M6286</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Lien.Nguyen on Tue Feb 14 19:57:40 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Marc,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Writing to memory is split up into two separate operations, writing and erase/program. The first operation which will be called “writing” is not really updating the memory, but only updating the temporary data register called the “page register”. The second operation which is called “erase/program” can be used to actually update the non-volatile memory.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In the first stage, you provide 6 LSBs of the address to select the offset on the "page register". And, in the second stage, MSBs of the address are provided,LSBs are “don’t care” &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;You can refer to section 36.5 in the UM for more detail.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Lien&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:03:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/CMSIS-EEPROM-Write/m-p/523650#M6286</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:03:26Z</dc:date>
    </item>
    <item>
      <title>Re: CMSIS EEPROM_Write</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/CMSIS-EEPROM-Write/m-p/523651#M6287</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Marc Crandall on Wed Feb 15 12:24:39 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you Lien.&amp;nbsp; I think I see now.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:03:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/CMSIS-EEPROM-Write/m-p/523651#M6287</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:03:27Z</dc:date>
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