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    <title>topic Re: SJA1105Q-EVB in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/SJA1105Q-EVB/m-p/2293291#M59166</link>
    <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/258764"&gt;@哈哈哈哈哈&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV&gt;
&lt;P&gt;On the SJA1105Q‑EVB, the 3.3 V power enable signal (VREG_EN) is typically controlled through two paths:&lt;/P&gt;
&lt;OL&gt;
&lt;LI&gt;A control signal from the MCU (LPC1788), MCU_VREG_INH.&lt;/LI&gt;
&lt;LI&gt;A hardware override via the J9 jumper, which can directly force VREG_EN on or off.&lt;BR /&gt;When J9 is used, it bypasses the MCU control path.&lt;/LI&gt;
&lt;/OL&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thank you.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;
&lt;/DIV&gt;</description>
    <pubDate>Wed, 14 Jan 2026 11:01:05 GMT</pubDate>
    <dc:creator>Alice_Yang</dc:creator>
    <dc:date>2026-01-14T11:01:05Z</dc:date>
    <item>
      <title>SJA1105Q-EVB</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SJA1105Q-EVB/m-p/2292895#M59164</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="_0-1768356546887.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/372736iE03378F204B9D0AF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="_0-1768356546887.png" alt="_0-1768356546887.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Hello, in the SJA1105Q-EVB evaluation board, the 3.3V enable pin VREG_EN can be controlled as shown in the figure. What is the process and principle between the control by the LPC1788FET208 main chip pin MCU_VREG_INH and the control by the J9 jumper?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 14 Jan 2026 02:14:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SJA1105Q-EVB/m-p/2292895#M59164</guid>
      <dc:creator>哈哈哈哈哈</dc:creator>
      <dc:date>2026-01-14T02:14:03Z</dc:date>
    </item>
    <item>
      <title>Re: SJA1105Q-EVB</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SJA1105Q-EVB/m-p/2293291#M59166</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/258764"&gt;@哈哈哈哈哈&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV&gt;
&lt;P&gt;On the SJA1105Q‑EVB, the 3.3 V power enable signal (VREG_EN) is typically controlled through two paths:&lt;/P&gt;
&lt;OL&gt;
&lt;LI&gt;A control signal from the MCU (LPC1788), MCU_VREG_INH.&lt;/LI&gt;
&lt;LI&gt;A hardware override via the J9 jumper, which can directly force VREG_EN on or off.&lt;BR /&gt;When J9 is used, it bypasses the MCU control path.&lt;/LI&gt;
&lt;/OL&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thank you.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;
&lt;/DIV&gt;</description>
      <pubDate>Wed, 14 Jan 2026 11:01:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SJA1105Q-EVB/m-p/2293291#M59166</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2026-01-14T11:01:05Z</dc:date>
    </item>
    <item>
      <title>Re: SJA1105Q-EVB</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SJA1105Q-EVB/m-p/2298751#M59236</link>
      <description>If J9 pins 1 and 2 are shorted, control comes from the PHY, meaning the MAC will also lose power. How can it be awakened then?</description>
      <pubDate>Fri, 23 Jan 2026 06:15:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SJA1105Q-EVB/m-p/2298751#M59236</guid>
      <dc:creator>哈哈哈哈哈</dc:creator>
      <dc:date>2026-01-23T06:15:16Z</dc:date>
    </item>
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