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    <title>LPC MicrocontrollersのトピックRe: LPC5536JBD100 Silicon 0A</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536JBD100-Silicon-0A/m-p/2133155#M58484</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/246985"&gt;@mf89&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Yes, this is explained in the comments.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Harry_Zhang_0-1752478709050.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/347368i2AC164282CE2FBBA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Harry_Zhang_0-1752478709050.png" alt="Harry_Zhang_0-1752478709050.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Thanks for your understanding.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Harry&lt;/P&gt;</description>
    <pubDate>Mon, 14 Jul 2025 08:09:41 GMT</pubDate>
    <dc:creator>Harry_Zhang</dc:creator>
    <dc:date>2025-07-14T08:09:41Z</dc:date>
    <item>
      <title>LPC5536JBD100 Silicon 0A</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536JBD100-Silicon-0A/m-p/2132782#M58481</link>
      <description>&lt;P&gt;Hi.&lt;/P&gt;&lt;P&gt;We just saw a message in pin_mux.c&lt;/P&gt;&lt;LI-CODE lang="c"&gt;    /* Note: PIO0_31 I3C0_SCL only works on A1 chip. */
    IOCON-&amp;gt;PIO[0][31] = ((IOCON-&amp;gt;PIO[0][31] &amp;amp;
                          /* Mask bits to zero which are setting */
                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK | IOCON_PIO_OD_MASK)))

                         /* Signal(function) select: PORT031 (pin 23) is configured as I3C0_SCL. */
                         | IOCON_PIO_FUNC(0x0Fu)

                         /* Select Digital mode: Enable Digital mode.
                          * Digital input is enabled. */
                         | IOCON_PIO_DIGIMODE(PIO0_31_DIGIMODE_DIGITAL)

                         /* Controls open-drain mode: Open-drain.
                          * Simulated open-drain output (high drive disabled). */
                         | IOCON_PIO_OD(PIO0_31_OD_OPEN_DRAIN));&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It says PIO0_31 I3C0_SCL only works on A1 chip. Is this true ?? If yes how is that not documented anywhere clearly ?&lt;BR /&gt;&lt;BR /&gt;We just have a whole Prototype Series of PCBs that go to the trash if this is correct.&lt;BR /&gt;&lt;BR /&gt;This should be marked in RED color and Double the Font Size in the Datasheet.&lt;/P&gt;</description>
      <pubDate>Sat, 12 Jul 2025 15:09:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536JBD100-Silicon-0A/m-p/2132782#M58481</guid>
      <dc:creator>mf89</dc:creator>
      <dc:date>2025-07-12T15:09:02Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5536JBD100 Silicon 0A</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536JBD100-Silicon-0A/m-p/2133155#M58484</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/246985"&gt;@mf89&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Yes, this is explained in the comments.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Harry_Zhang_0-1752478709050.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/347368i2AC164282CE2FBBA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Harry_Zhang_0-1752478709050.png" alt="Harry_Zhang_0-1752478709050.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Thanks for your understanding.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Harry&lt;/P&gt;</description>
      <pubDate>Mon, 14 Jul 2025 08:09:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536JBD100-Silicon-0A/m-p/2133155#M58484</guid>
      <dc:creator>Harry_Zhang</dc:creator>
      <dc:date>2025-07-14T08:09:41Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5536JBD100 Silicon 0A</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536JBD100-Silicon-0A/m-p/2144271#M58588</link>
      <description>&lt;P&gt;I agree. Errata like this should be more clearly marked and not hidden in a footnote. Marked in red color and bold print would do.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 31 Jul 2025 07:27:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536JBD100-Silicon-0A/m-p/2144271#M58588</guid>
      <dc:creator>danielholala</dc:creator>
      <dc:date>2025-07-31T07:27:24Z</dc:date>
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