topic Re: LPC4078 Suspected Faulty MCU in LPC Microcontrollers

LPC4078 Suspected Faulty MCU

michelle2022 — Wed, 14 May 2025 22:31:00 GMT

Hello,

We have encountered a critical issue where only MCUB consistently triggers a memory management fault (MemFault), while MCUA operates without any issue under identical conditions.

The MMFAR value during failure on MCUB indicates invalid addresses such as 0x123456C0, and the CFSR value is 0x8200.

These fault addresses appear to fall well outside of the valid SRAM or Flash memory map for the LPC4078.

In contrast, MCUA on the same board runs the exact same firmware without any faults or exceptions.

These symptoms strongly suggest that MCUB may be faulty.

I would like to know:

If this kind of issue is known or expected under any conditions,
Whether this behavior may be due to a defective chip,
If there are any further diagnostics we should perform before proceeding with a potential RMA

Please advise me on the appropriate next steps.

Thank you.

Michelle

Re: LPC4078 Suspected Faulty MCU

Alice_Yang — Mon, 19 May 2025 10:07:54 GMT

Hello @michelle2022

There is no information indicating that the LPC4078 has a common memory issue.

Only one chip is experiencing problems with the same code ? If so, perhaps this chip is damaged.

You can also verify whether the programming was done correctly by reading the flash memory.

Alice

Re: LPC4078 Suspected Faulty MCU

michelle2022 — Wed, 28 May 2025 16:43:11 GMT

Hello Alice,

I would like to share a root cause I discovered after spending time debugging a MemManage Fault issue on the LPC4078.

**Problem:**
When executing the firmware on an LPC4078 MCU, the system would run normally when debugging step-by-step, but would fall into a MemFault loop when running continuously without breakpoints.

**Root Cause:**
The issue was due to missing initialization of the Flash memory access time register (`LPC_SYSCTL->FLASHCFG`). By default, this register is not configured with enough wait states for high-speed operation.

In our case, after enabling PLL and running the CPU at higher frequencies, the Flash controller was still configured with its default access time, which was insufficient. This caused the CPU to fetch instructions too quickly from Flash, resulting in a precise bus fault and subsequent MemManage Fault.

**Solution:**
We resolved the issue by properly configuring the FLASHCFG register based on the CPU clock speed:

Chip_SYSCTL_SetFLASHAccess(FLASHTIM_SAFE_SETTING);

Thank you.

Michelle

Re: LPC4078 Suspected Faulty MCU

Alice_Yang — Thu, 29 May 2025 07:06:52 GMT

Hello @michelle2022

Thanks for your sharing.

Alice