topic Re: Adding SPI master to existing LPC55S36 software in LPC Microcontrollers

Adding SPI master to existing LPC55S36 software

TRCooper — Tue, 24 Dec 2024 04:35:03 GMT

I have an existing application running on an LPC55S36-EVK. Need to add an SPI master driver. Selected flexcom2.

Environment is FreeRTOS, NXP MCUXpresso 11.9.0.

Added driver with a small test harness that transmits a small character string.

Input clock rate to SPI is 32MHz; bit rate 500KHz. Driver initialized at startup. Default settings for driver.

Test program fills rx buffer with 0x00s before transmit/receive. When flexcom2 driver is configured for loopback mode, and SPI_MasterTransferNonBlocking is called, data is successfully transmitted and received. Callback function indicates good status.

When configured for non-loopback mode, call to driver completes, completion callback runs, status is good, but rx buffer has 0xff's for every char that was received, indicating MISO is pulled high. (SSEL0 and clock signals are floating; MISO jumpered to MOSI).

Oscope shows no activity on clk, ssel0, MOSI lines.

Pin configuration is as follows:

Clearly I have missed something during initialization; SPI port and driver are running but appear to not be connected to these lines.

Control registers for these pins show 0x0000_0101 for I/O control pins for PIO1_23, _25, and _26, which appears to be correct.

What have I ommitted/what can I check?

Regards,

TRCooper

Re: Adding SPI master to existing LPC55S36 software

xiangjun_rong — Tue, 24 Dec 2024 06:46:48 GMT

Hi,

First of all, pls check if the pin configuration is correct or not.

In the pin_mux.c, pls add the code:

* Enables the clock for the I/O controller.: Enable Clock. */
 CLOCK_EnableClock(kCLOCK_Iocon);
 
const uint32_t port1_pin23_config = (/* Pin is configured as FC2_SCK */
 IOCON_PIO_FUNC1 |
/* Selects pull-up function */
 IOCON_PIO_MODE_PULLUP |
/* Fast mode, slew rate control is disabled */
 IOCON_PIO_SLEW_FAST |
/* Input function is not inverted */
 IOCON_PIO_INV_DI |
/* Enables digital function */
 IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
 IOCON_PIO_OPENDRAIN_DI
/* Analog switch is closed (enabled) */
 );
/* PORT1 PIN23 (coords: 21) is configured as FC2_SCK */
 IOCON_PinMuxSet(IOCON, 1U, 23U, port1_pin23_config);
 
 
const uint32_t port0_pin26_config = (/* Pin is configured as FC2_MOSI */
 IOCON_PIO_FUNC1 |
/* Selects pull-up function */
 IOCON_PIO_MODE_PULLUP |
/* Fast mode, slew rate control is disabled */
 IOCON_PIO_SLEW_FAST |
/* Input function is not inverted */
 IOCON_PIO_INV_DI |
/* Enables digital function */
 IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
 IOCON_PIO_OPENDRAIN_DI
/* Analog switch is closed (enabled) */
 );
/* Port0 pin26 configured as FC2_MOSI */
 IOCON_PinMuxSet(IOCON, 0U, 26U, port0_pi26_config);
 
 
const uint32_t port1_pin25_config = (/* Pin is configured as FC2_SCK */
 IOCON_PIO_FUNC1 |
/* Selects pull-up function */
 IOCON_PIO_MODE_PULLUP |
/* Fast mode, slew rate control is disabled */
 IOCON_PIO_SLEW_FAST |
/* Input function is not inverted */
 IOCON_PIO_INV_DI |
/* Enables digital function */
 IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
 IOCON_PIO_OPENDRAIN_DI
/* Analog switch is closed (enabled) */
 );
/* PORT1 PIN25 (coords: 21) is configured as FC2_MISO */
 IOCON_PinMuxSet(IOCON, 1U, 25U, port1_pin25_config);
 
 
const uint32_t port1_pin26_config = (/* Pin is configured as FC2_SSL3 */
 IOCON_PIO_FUNC1 |
/* Selects pull-up function */
 IOCON_PIO_MODE_PULLUP |
/* Fast mode, slew rate control is disabled */
 IOCON_PIO_SLEW_FAST |
/* Input function is not inverted */
 IOCON_PIO_INV_DI |
/* Enables digital function */
 IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
 IOCON_PIO_OPENDRAIN_DI
/* Analog switch is closed (enabled) */
 );
/* PORT1 PIN25 (coords: 21) is configured as FC2_MISO */
 IOCON_PinMuxSet(IOCON, 1U, 26U, port1_pin26_config);
 
Secondly, because you use FC2_SSL3 pin, you have to clear the TXSSEL3_N bit,
while set the TXSSEL0_N,TXSSEL1_N,TXSSEL2_N bits in the FIFOWR register, in this way,
in master mode of SPI,the SSL3 pin will be asserted.
If you use spi driver, pls check where you can change the TXSSEL3_N bit.
 
 
Hope it is helpful.
BR
XiangJun Rong
 

Re: Adding SPI master to existing LPC55S36 software

TRCooper — Tue, 24 Dec 2024 20:23:04 GMT

Problem solved. Thanks for the insights.

First, flexcomm2 was not the best choice, being used for other functions on the eval board. Switching to flexcomm8 and using different pins helped. Flexcomm8 and the hs_spi is better suited for this test. Second, setting the xfer configuration flags the transfer data structure to SPI_FIFOWR_EOT_MASK was required to deassert SSEL0 after each transaction. This was not obvious from the documentation and examples; some digging was required, but all signals are now behaving as expected.