<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Flash Memory Write protection via MPU Configuration for LPC55XX / Cortex M33 in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1987713#M57210</link>
    <description>&lt;P&gt;Hello Pavel,&lt;/P&gt;&lt;P&gt;we are using LPC5504 and LPC55S04. I'm not sure I understand your comment. How using a signed image can help protect certain data areas from flash?&lt;/P&gt;&lt;P&gt;How can I protect a memory section using CPMA and CFPA?&lt;/P&gt;</description>
    <pubDate>Tue, 05 Nov 2024 06:49:59 GMT</pubDate>
    <dc:creator>pejo</dc:creator>
    <dc:date>2024-11-05T06:49:59Z</dc:date>
    <item>
      <title>Flash Memory Write protection via MPU Configuration for LPC55XX / Cortex M33</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1986923#M57203</link>
      <description>&lt;P&gt;Hi there,&lt;/P&gt;&lt;P&gt;I'm trying to protect some factory configuration in my flash memory. I thought that I could protect the flash memory from being written (when this is done using&amp;nbsp; the function&amp;nbsp;&lt;SPAN&gt;&lt;STRONG&gt;LPC55S0XFLASH_Program&lt;/STRONG&gt; or&amp;nbsp;&lt;STRONG&gt;LPC55S0XFLASH_Erase&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;SPAN&gt;).&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;When I configure the MPUs it seems that these functions don't trigger an exception or a hardware fault of any kind as I would expect and as it happened when I try to write in those areas by standard write operations.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Can you confirm that this is how it should happend and/or provide an alternative?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 04 Nov 2024 09:27:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1986923#M57203</guid>
      <dc:creator>pejo</dc:creator>
      <dc:date>2024-11-04T09:27:17Z</dc:date>
    </item>
    <item>
      <title>Re: Flash Memory Write protection via MPU Configuration for LPC55XX / Cortex M33</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1987242#M57206</link>
      <description>&lt;P&gt;Hello, my name is Pavel, and I will be supporting your case, what kind of part are you using? is this have an &lt;STRONG&gt;S&lt;/STRONG&gt; on the making number? example LPC55&lt;STRONG&gt;s&lt;/STRONG&gt;69, if yes, the other alternatives that I recommend is using a signed image.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If you want to know more about this there are some apps note that could help you to setup.&lt;/P&gt;
&lt;LI-SPOILER&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Pavel_Hernandez_0-1730743746378.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/308453i7B2C09FB63B433AE/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Pavel_Hernandez_0-1730743746378.png" alt="Pavel_Hernandez_0-1730743746378.png" /&gt;&lt;/span&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc5500-arm-cortex-m33/high-efficiency-arm-cortex-m33-based-microcontroller-family:LPC55S6x" target="_blank"&gt;LPC55S6x | Arm®Cortex®-M33 | 32-bit MCU | NXP Semiconductors&lt;/A&gt;&lt;/LI-SPOILER&gt;
&lt;P&gt;The other way is modifying the CPMA and CFPA using the Flash API or using the tool Blhost through PC Host serial interface.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Mon, 04 Nov 2024 18:11:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1987242#M57206</guid>
      <dc:creator>Pavel_Hernandez</dc:creator>
      <dc:date>2024-11-04T18:11:25Z</dc:date>
    </item>
    <item>
      <title>Re: Flash Memory Write protection via MPU Configuration for LPC55XX / Cortex M33</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1987713#M57210</link>
      <description>&lt;P&gt;Hello Pavel,&lt;/P&gt;&lt;P&gt;we are using LPC5504 and LPC55S04. I'm not sure I understand your comment. How using a signed image can help protect certain data areas from flash?&lt;/P&gt;&lt;P&gt;How can I protect a memory section using CPMA and CFPA?&lt;/P&gt;</description>
      <pubDate>Tue, 05 Nov 2024 06:49:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1987713#M57210</guid>
      <dc:creator>pejo</dc:creator>
      <dc:date>2024-11-05T06:49:59Z</dc:date>
    </item>
    <item>
      <title>Re: Flash Memory Write protection via MPU Configuration for LPC55XX / Cortex M33</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1989532#M57219</link>
      <description>&lt;P&gt;Hello, I recommend see this links could clear more about the differences of this LPC´s.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/LPC-Microcontrollers-Knowledge/LPC55-Disable-ISP-and-SWD-to-utilize-code-protection/ta-p/1654157" target="_blank"&gt;[LPC55]: Disable ISP and SWD to utilize code protection - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Wed, 06 Nov 2024 22:56:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1989532#M57219</guid>
      <dc:creator>Pavel_Hernandez</dc:creator>
      <dc:date>2024-11-06T22:56:21Z</dc:date>
    </item>
    <item>
      <title>Re: Flash Memory Write protection via MPU Configuration for LPC55XX / Cortex M33</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1996497#M57281</link>
      <description>&lt;P&gt;Hi Pavel,&lt;/P&gt;&lt;P&gt;thank you for your explanation and the documentation.&amp;nbsp;&lt;/P&gt;&lt;P&gt;The problem with this platform is that what I need is to protect a section of the flash with a system as flexible as MPU. MPUs as I understand does protect against common write operation (like assigning a pointer to that area and then writing in that mem section through the pointer) but not via flash functions APIs.&amp;nbsp;&lt;/P&gt;&lt;P&gt;This memory section which I need to protect can be modified during the product life cycle but only in a controlled way. If it is written by mistake it would end up in a non working product.&lt;/P&gt;&lt;P&gt;As I understood, if we need to protect some flash section against flash functions api the only way is to use PFR which would prevent it from being modified during the product life cycle (PFR is locked after boot) which is not what I'd need.&amp;nbsp;&lt;/P&gt;&lt;P&gt;So, my preferred approach (assumming that I processed all the information right) would be&amp;nbsp; to create a wrapper for the flash API functions which checks the MPU configuration before&amp;nbsp; flash write usage operations and modify only non protected pages.&lt;/P&gt;</description>
      <pubDate>Mon, 18 Nov 2024 15:20:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/1996497#M57281</guid>
      <dc:creator>pejo</dc:creator>
      <dc:date>2024-11-18T15:20:15Z</dc:date>
    </item>
    <item>
      <title>Re: Flash Memory Write protection via MPU Configuration for LPC55XX / Cortex M33</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/2007404#M57342</link>
      <description>&lt;P&gt;Hello, I recommend review the app note of secure boot on that mentioned different security boot process to protect the MCU.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN12283.pdf" target="_blank"&gt;LPC55Sxx Secure Boot&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Wed, 04 Dec 2024 20:37:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-Memory-Write-protection-via-MPU-Configuration-for-LPC55XX/m-p/2007404#M57342</guid>
      <dc:creator>Pavel_Hernandez</dc:creator>
      <dc:date>2024-12-04T20:37:59Z</dc:date>
    </item>
  </channel>
</rss>

