topic Re: What should the LPC84x FLASHTIM register be set to? in LPC Microcontrollers

What should the LPC84x FLASHTIM register be set to?

george — Sun, 27 Oct 2024 16:23:47 GMT

Hello Team,

My customers are using LPC845 and they frequently encounter a HardFault while debugging.

Their painstaking analysis revealed that it was related to the FLASHTIM register.
They are using a 30MHz system clock, in which case setting FLASHTIM=1 will prevent the HardFault.

I found similar posts in the community, but the Flash access time specifications are not clear here.
https://community.nxp.com/t5/LPC-Microcontrollers/LPC8xx-Flash-access-time-aka-setting-FLASHTIM/m-p/1186229

In other LPC series it is clearly stated in UM.
Ex LPC111x :

Ex LPC546xx :

However, this point is not clearly stated in the LPC84x UM.

Please clarify the specifications related to FLASHTIM so that customers can freely handle the system clock.

Thanks,
George

Re: What should the LPC84x FLASHTIM register be set to?

xiangjun_rong — Tue, 29 Oct 2024 03:29:16 GMT

Hi,

I suppose the SDK team has addressed the issue.

Pls download SDK package from the website:

https://mcuxpresso.nxp.com/en

The SDK version has updated to 2.16.000, which has added a function void CLOCK_SetFLASHAccessCyclesForFreq(uint32_t iFreq) to solve the issue.

/*! brief Set the flash wait states for the input freuqency.
* param iFreq : Input frequency
*/
void CLOCK_SetFLASHAccessCyclesForFreq(uint32_t iFreq)
{
uint32_t num_wait_states;
if (iFreq <= 24000000UL)
{
/* [0 - 24 MHz] */
num_wait_states = 0UL;
}
else
{
/* Above 24 MHz */
num_wait_states = 1UL;
}

FLASH_CTRL->FLASHCFG =
((FLASH_CTRL->FLASHCFG & ~FLASH_CTRL_FLASHCFG_FLASHTIM_MASK) | FLASH_CTRL_FLASHCFG_FLASHTIM(num_wait_states));
}

when the core frequency is less than 24MHz, 1 clock cycle is added. when the core frequency is above 24MHz, 2 clock cycle is added.

For the user manual update, it requires time.

Hope it can help you

XiangJun Rong

Re: What should the LPC84x FLASHTIM register be set to?

george — Tue, 29 Oct 2024 06:53:41 GMT

Hello @xiangjun_rong

Thanks for the reply, as far as I know I can't find that information anywhere in the NXP　documentation.

In other words, So does that mean the flash access time needs to be 24MHz or less as a chip specification?

Thanks,
George

Re: What should the LPC84x FLASHTIM register be set to?

xiangjun_rong — Tue, 29 Oct 2024 10:00:05 GMT

Hi,

Unfortunately, the section 6.4.1 Flash configuration register in UM11029.pdf has not any update till now.

But the SDK package adds a function to set up the FLASHTIM bits in FLASHCFG reg.

The core frequency of LPC84x can reach up to 30MHz, if the core frequency is less than 24Mhz, you set the FLASHTIM bits as 0, which means 1 clock cycle delay. if the core frequency is equal or greater than 24Mhz and less than 30Mhz, you set the FLASHTIM bits as 1, which means 2 clock cycle delay.

The void CLOCK_SetFLASHAccessCyclesForFreq(uint32_t iFreq) api function input variable is the actual core frequency, it set up the FLASHTIM bits based on the core frequency.

Hope it can help you

XiangJun Rong

Re: What should the LPC84x FLASHTIM register be set to?

george — Thu, 31 Oct 2024 09:44:43 GMT

hello @xiangjun_rong,

There is no sample code that uses the CLOCK_SetFLASHAccessCyclesForFreq() in the latest SDK, so few users will notice its existence.

In any case, our question is answered.
Thank you for your detailed answer.

BR,
George