<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC MicrocontrollersのトピックIMXRT1171 switching context ISR</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/IMXRT1171-switching-context-ISR/m-p/1975858#M57089</link>
    <description>&lt;P&gt;Hi, I use RTOS Threadx and into the folder&amp;nbsp;&lt;SPAN&gt;Threadx\threadx-6.4.1_rel\ports\cortex_m7\gnu the file readme_threadx.txt report about manged interrupts&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;A ThreadX managed interrupt is defined below. By following these conventions, the&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;application ISR is then allowed access to various ThreadX services from the ISR.&lt;/DIV&gt;&lt;DIV&gt;Here is the standard template for managed ISRs in ThreadX:&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; .global &amp;nbsp;__tx_IntHandler&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; .thumb_func&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;__tx_IntHandler:&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; VOID InterruptHandler (VOID)&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; {&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PUSH &amp;nbsp; &amp;nbsp;{r0, lr}&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; &amp;nbsp; &amp;nbsp;/* Do interrupt handler work here */&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; &amp;nbsp; &amp;nbsp;/* BL &amp;lt;your interrupt routine in C&amp;gt; */&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; POP &amp;nbsp; &amp;nbsp; {r0, lr}&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; BX &amp;nbsp; &amp;nbsp; &amp;nbsp;lr&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; }&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;Note: the Cortex-M requires exception handlers to be thumb labels, this implies bit 0 set.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;To accomplish this, the declaration of the label has to be preceded by the assembler directive&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;.thumb_func to instruct the linker to create thumb labels. The label __tx_IntHandler needs to&amp;nbsp;&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;be inserted in the correct location in the interrupt vector table. This table is typically&amp;nbsp;&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;located in either your runtime startup file or in the tx_initialize_low_level.S file.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;but in every example MCUXpresso project or like "driver\fsl_lpuart.c" file the ISR function it's&amp;nbsp;&lt;SPAN&gt;written in C will take the form (where "your_C_isr" is an entry in the vector table):&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;void your_C_isr(void)&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;{&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;/* ISR processing goes here, including any needed function calls. */&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;SDK_ISR_EXIT_BARRIER;&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;}&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;so I'd like to understand witch is the correct way to write ISR function Threadx or MCUXpresso ?&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;bye&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;</description>
    <pubDate>Thu, 17 Oct 2024 08:23:31 GMT</pubDate>
    <dc:creator>Nexus76</dc:creator>
    <dc:date>2024-10-17T08:23:31Z</dc:date>
    <item>
      <title>IMXRT1171 switching context ISR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/IMXRT1171-switching-context-ISR/m-p/1975858#M57089</link>
      <description>&lt;P&gt;Hi, I use RTOS Threadx and into the folder&amp;nbsp;&lt;SPAN&gt;Threadx\threadx-6.4.1_rel\ports\cortex_m7\gnu the file readme_threadx.txt report about manged interrupts&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;A ThreadX managed interrupt is defined below. By following these conventions, the&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;application ISR is then allowed access to various ThreadX services from the ISR.&lt;/DIV&gt;&lt;DIV&gt;Here is the standard template for managed ISRs in ThreadX:&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; .global &amp;nbsp;__tx_IntHandler&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; .thumb_func&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;__tx_IntHandler:&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; VOID InterruptHandler (VOID)&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; {&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; PUSH &amp;nbsp; &amp;nbsp;{r0, lr}&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; &amp;nbsp; &amp;nbsp;/* Do interrupt handler work here */&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; &amp;nbsp; &amp;nbsp;/* BL &amp;lt;your interrupt routine in C&amp;gt; */&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; POP &amp;nbsp; &amp;nbsp; {r0, lr}&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; BX &amp;nbsp; &amp;nbsp; &amp;nbsp;lr&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;; }&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;Note: the Cortex-M requires exception handlers to be thumb labels, this implies bit 0 set.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;To accomplish this, the declaration of the label has to be preceded by the assembler directive&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;.thumb_func to instruct the linker to create thumb labels. The label __tx_IntHandler needs to&amp;nbsp;&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;be inserted in the correct location in the interrupt vector table. This table is typically&amp;nbsp;&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;located in either your runtime startup file or in the tx_initialize_low_level.S file.&lt;/FONT&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;but in every example MCUXpresso project or like "driver\fsl_lpuart.c" file the ISR function it's&amp;nbsp;&lt;SPAN&gt;written in C will take the form (where "your_C_isr" is an entry in the vector table):&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;void your_C_isr(void)&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;{&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;/* ISR processing goes here, including any needed function calls. */&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;SDK_ISR_EXIT_BARRIER;&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT size="1 2 3 4 5 6 7"&gt;}&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;so I'd like to understand witch is the correct way to write ISR function Threadx or MCUXpresso ?&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;bye&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Thu, 17 Oct 2024 08:23:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/IMXRT1171-switching-context-ISR/m-p/1975858#M57089</guid>
      <dc:creator>Nexus76</dc:creator>
      <dc:date>2024-10-17T08:23:31Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT1171 switching context ISR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/IMXRT1171-switching-context-ISR/m-p/1981558#M57151</link>
      <description>&lt;P&gt;Both approach are correct, the criteria to chose which to use should be based on the specific needs however for microcontroller ISRs we need to consider that the routine should be as short and simple as possible.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Omar&lt;/P&gt;</description>
      <pubDate>Fri, 25 Oct 2024 00:02:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/IMXRT1171-switching-context-ISR/m-p/1981558#M57151</guid>
      <dc:creator>Omar_Anguiano</dc:creator>
      <dc:date>2024-10-25T00:02:52Z</dc:date>
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  </channel>
</rss>

