LPC MicrocontrollersのトピックLPC43S70 HSADC THRESHOLD_SEL=1(THR_A) And HSADC MATCH_VALUE=1

LPC43S70 HSADC THRESHOLD_SEL=1(THR_A) And HSADC MATCH_VALUE=1

robberpen — Wed, 21 Aug 2024 05:21:38 GMT

Want to know the behavior HSADC_DESC_MATCH(0x0) and HSADC_DESC_THRESH_A below example,

As my undestand,

HSADC_DESC_MATCH(0x0) will start simpling imediataly in this case.
and HSADC_DESC_THRESH_A will start simpling at trigger threshold_A.

In this case. which behavior will be higher priority? simpling imediataly or wait unitl THRSH_A trigger?

Chip_HSADC_SetupDescEntry(LPC_ADCHS, 0, 0, (HSADC_DESC_CH(1) |
HSADC_DESC_BRANCH_NEXT | HSADC_DESC_MATCH(0x1) | HSADC_DESC_THRESH_A |
HSADC_DESC_RESET_TIMER));

Re: LPC43S70 HSADC THRESHOLD_SEL=1(THR_A) And HSADC MATCH_VALUE=1

xiangjun_rong — Thu, 22 Aug 2024 03:46:49 GMT

Hi,

Q1)HSADC_DESC_MATCH(0x0)will start sampling immediately in this case.

>>>>>The HSADC_DESC_MATCH(0x0) does not mean that the ADC converter starts-up immediately, the HSADC_DESC_MATCH(0xxx) can control the ADC sampling time(ADC conversion rate). Setting HSADC_DESC_MATCH(0x00) means that the ADC can get one sample for each ADC clock.

You can use software trigger to start ADC conversion by setting the SW_TRIGGER bit in Trigger register, pls refer to section 48.6.5 Trigger register.

You can use hardware trigger to start ADC conversion by setting the ADCHS_TRIGGER_IN reg, pls refer to section 18.4.25 ADCHS trigger input multiplexer (ADCHS_TRIGGER_IN).

Q2)and HSADC_DESC_THRESH_A will start simpling at trigger threshold_A.

>>>>>DESCRIPTOR0x[THRESHOLD_SEL] selects the ADC result comparsion threshold register, it is NOT related to ADC starting.

Hope it can help you

XiangJun Rong

Re: LPC43S70 HSADC THRESHOLD_SEL=1(THR_A) And HSADC MATCH_VALUE=1

robberpen — Thu, 22 Aug 2024 14:37:52 GMT

Hi @xiangjun_rong

I don't quite understand.

Here a case of both HSADC_DESC_THRESH_A and HSADC_DESC_MATCH(0x10) set to descriptor.

then while threshold_A was trigger at hsadc timer 0x5, what is the timing clock of simpling? clock 0x5, 0x6 or 0x10?

thanks
Peter

Re: LPC43S70 HSADC THRESHOLD_SEL=1(THR_A) And HSADC MATCH_VALUE=1

xiangjun_rong — Fri, 23 Aug 2024 02:50:49 GMT

Hi,

I suppose that you misunderstood the threshold_A, it is not a trigger source, it is a compare register, the ADC sample result is compared with the threshold_A register automatically, then update flag or fire interrupt which indicates that the analog signal is below a threshold or above a threshold.

If you set HSADC_DESC_MATCH(0x10), the adchs module has an internal counter, the tick is the ADC clock, after hardware/software trigger, when the counter reaches 16 or 0x10, the ADC will convert, so the ADC conversion rate is Fadc/16.is you set HSADC_DESC_MATCH(0x00), the ADC will generate a sample for each ADC clock cycle.

Hope it can help you

Xiangjun Rong

xiangjun_rong_0-1724380546937.png

Re: LPC43S70 HSADC THRESHOLD_SEL=1(THR_A) And HSADC MATCH_VALUE=1

robberpen — Fri, 23 Aug 2024 03:35:14 GMT

Hi xiangjun_rong

thanks for your clarification.
No more question.