<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC MicrocontrollersのトピックRe: LPC802 SPI Justification</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1918157#M56537</link>
    <description>Thanks!</description>
    <pubDate>Fri, 26 Jul 2024 14:02:09 GMT</pubDate>
    <dc:creator>fingew</dc:creator>
    <dc:date>2024-07-26T14:02:09Z</dc:date>
    <item>
      <title>LPC802 SPI Justification</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1909800#M56466</link>
      <description>&lt;P&gt;What is the justification for data in the TXDAT and RXDAT registers for the SPI peripheral for the LPC802?&amp;nbsp; Does it matter if the output is selected as LSB or MSB first?&lt;/P&gt;&lt;P&gt;The User's Manual is silent on the subject.&lt;/P&gt;</description>
      <pubDate>Tue, 16 Jul 2024 14:41:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1909800#M56466</guid>
      <dc:creator>fingew</dc:creator>
      <dc:date>2024-07-16T14:41:09Z</dc:date>
    </item>
    <item>
      <title>Re: LPC802 SPI Justification</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1910163#M56468</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;You can select the MSB first or LSB first, but the master spi and slave spi devices must match.&lt;/P&gt;
&lt;P&gt;Pls refer to section 14.6.1 SPI Configuration register in the UM11045.pdf&lt;/P&gt;
&lt;P&gt;The LSBF bit in the CFG reg defines the MSB/LSB first.&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="xiangjun_rong_0-1721180504274.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/288850i4F155A549483D611/image-size/medium?v=v2&amp;amp;px=400" role="button" title="xiangjun_rong_0-1721180504274.png" alt="xiangjun_rong_0-1721180504274.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 17 Jul 2024 01:44:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1910163#M56468</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2024-07-17T01:44:05Z</dc:date>
    </item>
    <item>
      <title>Re: LPC802 SPI Justification</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1917183#M56529</link>
      <description>&lt;P&gt;Thank you, but that doesn't answer my question.&lt;/P&gt;&lt;P&gt;Let me give an example.&amp;nbsp; Say you have the transfer configured for 12-bit length, and you receive data, say all ones.&lt;/P&gt;&lt;P&gt;Would the data register be 0xFFF0 (left justification) or 0x0FFF (right justification)?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 25 Jul 2024 12:26:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1917183#M56529</guid>
      <dc:creator>fingew</dc:creator>
      <dc:date>2024-07-25T12:26:47Z</dc:date>
    </item>
    <item>
      <title>Re: LPC802 SPI Justification</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1917726#M56531</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;
&lt;P&gt;Q:Let me give an example. Say you have the transfer configured for 12-bit length, and you receive data, say all ones.&lt;/P&gt;
&lt;P&gt;Would the data register be 0xFFF0 (left justification) or 0x0FFF (right justification)?&lt;/P&gt;
&lt;P&gt;&amp;gt;&amp;gt;&amp;gt;&amp;gt;&amp;gt;The LPC802 SPI always use right justification, for example, if you want to receive 12 bits data with all bits 1, you will receive&amp;nbsp; 0x0FFF in the receiver reg.&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Fri, 26 Jul 2024 03:20:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1917726#M56531</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2024-07-26T03:20:19Z</dc:date>
    </item>
    <item>
      <title>Re: LPC802 SPI Justification</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1918157#M56537</link>
      <description>Thanks!</description>
      <pubDate>Fri, 26 Jul 2024 14:02:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC802-SPI-Justification/m-p/1918157#M56537</guid>
      <dc:creator>fingew</dc:creator>
      <dc:date>2024-07-26T14:02:09Z</dc:date>
    </item>
  </channel>
</rss>

