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  <channel>
    <title>topic The GPIO of LPC1125 cannot output low level, why? in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1826903#M55631</link>
    <description>&lt;P&gt;The GPIO of the LPC1125 cannot output low level, why?&lt;/P&gt;&lt;P&gt;main();&lt;/P&gt;&lt;LI-CODE lang="c"&gt;int main (void) {
	SystemCoreClockUpdate();//LPC1125 Clock Settings. LPC1125时钟设置
	LPC_SYSCON-&amp;gt;SYSAHBCLKCTRL |= (1UL &amp;lt;&amp;lt; 6 | 1UL &amp;lt;&amp;lt; 16);
	/* enable clock for GPIO */
	LPC_IOCON-&amp;gt;PIO2_0 = 0xD0;
	LPC_IOCON-&amp;gt;PIO2_1 = 0xD0;
	LPC_IOCON-&amp;gt;PIO2_2 = 0xD0;
	LPC_GPIO2-&amp;gt;DIR = 0x07;
	LPC_GPIO2-&amp;gt;MASKED_ACCESS[0x07] = 0;
	//However, PIO2_0 is always high, and cannot output low level. The program downloads normally.
	//但是PIO2_0始终是高电平，无法输出低电平。程序下载正常。
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;SystemCoreClockUpdate();&lt;/P&gt;&lt;LI-CODE lang="c"&gt;void SystemCoreClockUpdate (void)               /* Get Core Clock Frequency   */
{
  uint32_t oscClk = 0;

  /* Determine clock frequency according to clock register values             */
  switch ((LPC_SYSCON-&amp;gt;WDTOSCCTRL &amp;gt;&amp;gt; 5) &amp;amp; 0x0F) {
    case 0:  oscClk =       0; break;
    case 1:  oscClk =  600000; break;
    case 2:  oscClk = 1050000; break;
    case 3:  oscClk = 1400000; break;
    case 4:  oscClk = 1750000; break;
    case 5:  oscClk = 2100000; break;
    case 6:  oscClk = 2400000; break;
    case 7:  oscClk = 2700000; break;
    case 8:  oscClk = 3000000; break;
    case 9:  oscClk = 3250000; break;
    case 10: oscClk = 3500000; break;
    case 11: oscClk = 3750000; break;
    case 12: oscClk = 4000000; break;
    case 13: oscClk = 4200000; break;
    case 14: oscClk = 4400000; break;
    case 15: oscClk = 4600000; break;
  }
  oscClk /= ((LPC_SYSCON-&amp;gt;WDTOSCCTRL &amp;amp; 0x1F) &amp;lt;&amp;lt; 1) + 2;

  switch (LPC_SYSCON-&amp;gt;MAINCLKSEL &amp;amp; 0x03) {
    case 0:                                     /* Internal RC oscillator     */
      SystemCoreClock = __IRC_OSC_CLK;
      break;
    case 1:                                     /* Input Clock to System PLL  */
      switch (LPC_SYSCON-&amp;gt;SYSPLLCLKSEL &amp;amp; 0x03) {
        case 0:                                 /* Internal RC oscillator     */
          SystemCoreClock = __IRC_OSC_CLK;
          break;
        case 1:                                 /* System oscillator          */
          SystemCoreClock = __SYS_OSC_CLK;
          break;
        case 2:                                 /* Reserved                   */
        case 3:                                 /* Reserved                   */
          SystemCoreClock = 0;
          break;
      }
      break;
    case 2:                                     /* WDT Oscillator             */
      SystemCoreClock = oscClk;
      break;
    case 3:                                     /* System PLL Clock Out       */
      switch (LPC_SYSCON-&amp;gt;SYSPLLCLKSEL &amp;amp; 0x03) {
        case 0:                                 /* Internal RC oscillator     */
          if (LPC_SYSCON-&amp;gt;SYSPLLCTRL &amp;amp; 0x180) {
            SystemCoreClock = __IRC_OSC_CLK;
          } else {
            SystemCoreClock = __IRC_OSC_CLK * ((LPC_SYSCON-&amp;gt;SYSPLLCTRL &amp;amp; 0x01F) + 1);
          }
          break;
        case 1:                                 /* System oscillator          */
          if (LPC_SYSCON-&amp;gt;SYSPLLCTRL &amp;amp; 0x180) {
            SystemCoreClock = __SYS_OSC_CLK;
          } else {
            SystemCoreClock = __SYS_OSC_CLK * ((LPC_SYSCON-&amp;gt;SYSPLLCTRL &amp;amp; 0x01F) + 1);
          }
          break;
        case 2:                                 /* Reserved                   */
        case 3:                                 /* Reserved                   */
          SystemCoreClock = 0;
          break;
      }
      break;
  }
  SystemCoreClock /= LPC_SYSCON-&amp;gt;SYSAHBCLKDIV;
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;SYSAHBCLKCTR&lt;/P&gt;&lt;LI-CODE lang="c"&gt;SYSAHBCLKCTRL
bit	Symbol	Value	Description
6	GPIO	0		Disable clock for GPIO.
			1		Enable *

16	IOCON	0		Disable clock for I/O configuration block.
			1		Enable *&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;LPC_GPIO2-&amp;gt;DIR&lt;/P&gt;&lt;P&gt;LPC_GPIO2-&amp;gt;MASKED_ACCESS&lt;/P&gt;&lt;LI-CODE lang="c"&gt;/*------------- General Purpose Input/Output (GPIO) --------------------------*/
/** @addtogroup LPC112x_GPIO LPC112x General Purpose Input/Output 
  @{
*/
typedef struct
{
  union {
    __IO uint32_t MASKED_ACCESS[4096];  /*!&amp;lt; Offset: 0x0000 to 0x3FFC Port data Register for pins PIOn_0 to PIOn_11 (R/W) */
    struct {
         uint32_t RESERVED0[4095];
    __IO uint32_t DATA;                 /*!&amp;lt; Offset: 0x3FFC Port data Register (R/W) */
    };
  };
       uint32_t RESERVED1[4096];
  __IO uint32_t DIR;                    /*!&amp;lt; Offset: 0x8000 Data direction Register (R/W) */
  __IO uint32_t IS;                     /*!&amp;lt; Offset: 0x8004 Interrupt sense Register (R/W) */
  __IO uint32_t IBE;                    /*!&amp;lt; Offset: 0x8008 Interrupt both edges Register (R/W) */
  __IO uint32_t IEV;                    /*!&amp;lt; Offset: 0x800C Interrupt event Register  (R/W) */
  __IO uint32_t IE;                     /*!&amp;lt; Offset: 0x8010 Interrupt mask Register (R/W) */
  __I uint32_t RIS;                    /*!&amp;lt; Offset: 0x8014 Raw interrupt status Register (R/ ) */
  __I uint32_t MIS;                    /*!&amp;lt; Offset: 0x8018 Masked interrupt status Register (R/ ) */
  __O uint32_t IC;                     /*!&amp;lt; Offset: 0x801C Interrupt clear Register (/W) */
} LPC_GPIO_TypeDef;&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;//However, PIO2_0 is always high, and cannot output low level. The program downloads normally.&lt;BR /&gt;//但是PIO2_0始终是高电平，无法输出低电平。程序下载正常。&lt;/P&gt;</description>
    <pubDate>Wed, 13 Mar 2024 07:34:54 GMT</pubDate>
    <dc:creator>Wei_Lang</dc:creator>
    <dc:date>2024-03-13T07:34:54Z</dc:date>
    <item>
      <title>The GPIO of LPC1125 cannot output low level, why?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1826903#M55631</link>
      <description>&lt;P&gt;The GPIO of the LPC1125 cannot output low level, why?&lt;/P&gt;&lt;P&gt;main();&lt;/P&gt;&lt;LI-CODE lang="c"&gt;int main (void) {
	SystemCoreClockUpdate();//LPC1125 Clock Settings. LPC1125时钟设置
	LPC_SYSCON-&amp;gt;SYSAHBCLKCTRL |= (1UL &amp;lt;&amp;lt; 6 | 1UL &amp;lt;&amp;lt; 16);
	/* enable clock for GPIO */
	LPC_IOCON-&amp;gt;PIO2_0 = 0xD0;
	LPC_IOCON-&amp;gt;PIO2_1 = 0xD0;
	LPC_IOCON-&amp;gt;PIO2_2 = 0xD0;
	LPC_GPIO2-&amp;gt;DIR = 0x07;
	LPC_GPIO2-&amp;gt;MASKED_ACCESS[0x07] = 0;
	//However, PIO2_0 is always high, and cannot output low level. The program downloads normally.
	//但是PIO2_0始终是高电平，无法输出低电平。程序下载正常。
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;SystemCoreClockUpdate();&lt;/P&gt;&lt;LI-CODE lang="c"&gt;void SystemCoreClockUpdate (void)               /* Get Core Clock Frequency   */
{
  uint32_t oscClk = 0;

  /* Determine clock frequency according to clock register values             */
  switch ((LPC_SYSCON-&amp;gt;WDTOSCCTRL &amp;gt;&amp;gt; 5) &amp;amp; 0x0F) {
    case 0:  oscClk =       0; break;
    case 1:  oscClk =  600000; break;
    case 2:  oscClk = 1050000; break;
    case 3:  oscClk = 1400000; break;
    case 4:  oscClk = 1750000; break;
    case 5:  oscClk = 2100000; break;
    case 6:  oscClk = 2400000; break;
    case 7:  oscClk = 2700000; break;
    case 8:  oscClk = 3000000; break;
    case 9:  oscClk = 3250000; break;
    case 10: oscClk = 3500000; break;
    case 11: oscClk = 3750000; break;
    case 12: oscClk = 4000000; break;
    case 13: oscClk = 4200000; break;
    case 14: oscClk = 4400000; break;
    case 15: oscClk = 4600000; break;
  }
  oscClk /= ((LPC_SYSCON-&amp;gt;WDTOSCCTRL &amp;amp; 0x1F) &amp;lt;&amp;lt; 1) + 2;

  switch (LPC_SYSCON-&amp;gt;MAINCLKSEL &amp;amp; 0x03) {
    case 0:                                     /* Internal RC oscillator     */
      SystemCoreClock = __IRC_OSC_CLK;
      break;
    case 1:                                     /* Input Clock to System PLL  */
      switch (LPC_SYSCON-&amp;gt;SYSPLLCLKSEL &amp;amp; 0x03) {
        case 0:                                 /* Internal RC oscillator     */
          SystemCoreClock = __IRC_OSC_CLK;
          break;
        case 1:                                 /* System oscillator          */
          SystemCoreClock = __SYS_OSC_CLK;
          break;
        case 2:                                 /* Reserved                   */
        case 3:                                 /* Reserved                   */
          SystemCoreClock = 0;
          break;
      }
      break;
    case 2:                                     /* WDT Oscillator             */
      SystemCoreClock = oscClk;
      break;
    case 3:                                     /* System PLL Clock Out       */
      switch (LPC_SYSCON-&amp;gt;SYSPLLCLKSEL &amp;amp; 0x03) {
        case 0:                                 /* Internal RC oscillator     */
          if (LPC_SYSCON-&amp;gt;SYSPLLCTRL &amp;amp; 0x180) {
            SystemCoreClock = __IRC_OSC_CLK;
          } else {
            SystemCoreClock = __IRC_OSC_CLK * ((LPC_SYSCON-&amp;gt;SYSPLLCTRL &amp;amp; 0x01F) + 1);
          }
          break;
        case 1:                                 /* System oscillator          */
          if (LPC_SYSCON-&amp;gt;SYSPLLCTRL &amp;amp; 0x180) {
            SystemCoreClock = __SYS_OSC_CLK;
          } else {
            SystemCoreClock = __SYS_OSC_CLK * ((LPC_SYSCON-&amp;gt;SYSPLLCTRL &amp;amp; 0x01F) + 1);
          }
          break;
        case 2:                                 /* Reserved                   */
        case 3:                                 /* Reserved                   */
          SystemCoreClock = 0;
          break;
      }
      break;
  }
  SystemCoreClock /= LPC_SYSCON-&amp;gt;SYSAHBCLKDIV;
}&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;SYSAHBCLKCTR&lt;/P&gt;&lt;LI-CODE lang="c"&gt;SYSAHBCLKCTRL
bit	Symbol	Value	Description
6	GPIO	0		Disable clock for GPIO.
			1		Enable *

16	IOCON	0		Disable clock for I/O configuration block.
			1		Enable *&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;LPC_GPIO2-&amp;gt;DIR&lt;/P&gt;&lt;P&gt;LPC_GPIO2-&amp;gt;MASKED_ACCESS&lt;/P&gt;&lt;LI-CODE lang="c"&gt;/*------------- General Purpose Input/Output (GPIO) --------------------------*/
/** @addtogroup LPC112x_GPIO LPC112x General Purpose Input/Output 
  @{
*/
typedef struct
{
  union {
    __IO uint32_t MASKED_ACCESS[4096];  /*!&amp;lt; Offset: 0x0000 to 0x3FFC Port data Register for pins PIOn_0 to PIOn_11 (R/W) */
    struct {
         uint32_t RESERVED0[4095];
    __IO uint32_t DATA;                 /*!&amp;lt; Offset: 0x3FFC Port data Register (R/W) */
    };
  };
       uint32_t RESERVED1[4096];
  __IO uint32_t DIR;                    /*!&amp;lt; Offset: 0x8000 Data direction Register (R/W) */
  __IO uint32_t IS;                     /*!&amp;lt; Offset: 0x8004 Interrupt sense Register (R/W) */
  __IO uint32_t IBE;                    /*!&amp;lt; Offset: 0x8008 Interrupt both edges Register (R/W) */
  __IO uint32_t IEV;                    /*!&amp;lt; Offset: 0x800C Interrupt event Register  (R/W) */
  __IO uint32_t IE;                     /*!&amp;lt; Offset: 0x8010 Interrupt mask Register (R/W) */
  __I uint32_t RIS;                    /*!&amp;lt; Offset: 0x8014 Raw interrupt status Register (R/ ) */
  __I uint32_t MIS;                    /*!&amp;lt; Offset: 0x8018 Masked interrupt status Register (R/ ) */
  __O uint32_t IC;                     /*!&amp;lt; Offset: 0x801C Interrupt clear Register (/W) */
} LPC_GPIO_TypeDef;&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;//However, PIO2_0 is always high, and cannot output low level. The program downloads normally.&lt;BR /&gt;//但是PIO2_0始终是高电平，无法输出低电平。程序下载正常。&lt;/P&gt;</description>
      <pubDate>Wed, 13 Mar 2024 07:34:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1826903#M55631</guid>
      <dc:creator>Wei_Lang</dc:creator>
      <dc:date>2024-03-13T07:34:54Z</dc:date>
    </item>
    <item>
      <title>Re: The GPIO of LPC1125 cannot output low level, why?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1827026#M55634</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Just after&amp;nbsp; a brief review, can you use the code and test the pin:&lt;/P&gt;
&lt;P&gt;change&lt;/P&gt;
&lt;P&gt;LPC_GPIO2-&amp;gt;MASKED_ACCESS[0x07] = 0;&lt;/P&gt;
&lt;P&gt;to&lt;/P&gt;
&lt;P&gt;LPC_GPIO2-&amp;gt;MASKED_ACCESS[4095] = 0;&lt;/P&gt;
&lt;P&gt;Pls have a try&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Wed, 13 Mar 2024 09:45:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1827026#M55634</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2024-03-13T09:45:23Z</dc:date>
    </item>
    <item>
      <title>Re: The GPIO of LPC1125 cannot output low level, why?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1827906#M55645</link>
      <description>&lt;P&gt;It cannot&amp;nbsp;&lt;SPAN&gt;solve when I changing to :&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;LPC_GPIO2-&amp;gt;MASKED_ACCESS[4095] = 0;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;There may be other problems.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 02:28:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1827906#M55645</guid>
      <dc:creator>Wei_Lang</dc:creator>
      <dc:date>2024-03-14T02:28:16Z</dc:date>
    </item>
    <item>
      <title>Re: The GPIO of LPC1125 cannot output low level, why?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1831847#M55696</link>
      <description>&lt;P&gt;&lt;SPAN&gt;1. SWDIO/PIO1_3, add external 4.7K to 10K pull up resistor. SWD_CLK don't add external circuit.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2. RESET/PIO0_0, should add 4.7K to 10K pull up resistor, and 0.1uf Capacitor to ground.&lt;BR /&gt;3. P0_1, should add 4.7K to 10K pull up resistor.&lt;BR /&gt;4. Check the schematic diagram and select the correct PIO2_0.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Wei Lang&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Mar 2024 08:54:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/The-GPIO-of-LPC1125-cannot-output-low-level-why/m-p/1831847#M55696</guid>
      <dc:creator>Wei_Lang</dc:creator>
      <dc:date>2024-03-20T08:54:25Z</dc:date>
    </item>
  </channel>
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