<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Flash LPC55s36 with OpenOCD in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1806374#M55411</link>
    <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/228590"&gt;@rolandgroza&lt;/a&gt; ! Thank you for the cfg file. I used it and have the same error. Have you managed to make it work?&lt;/P&gt;</description>
    <pubDate>Wed, 14 Feb 2024 08:37:55 GMT</pubDate>
    <dc:creator>leannee</dc:creator>
    <dc:date>2024-02-14T08:37:55Z</dc:date>
    <item>
      <title>Flash LPC55s36 with OpenOCD</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1794295#M55221</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm trying to flash a LPC55s36 MCU using OpenOCD, but it seems like the reset step is failing and I'm not sure where to go from there.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;OpenOCD does not support the board yet, but there is a pull request (&lt;A href="https://review.openocd.org/c/openocd/+/6800?tab=comments)" target="_blank"&gt;https://review.openocd.org/c/openocd/+/6800?tab=comments)&amp;nbsp;&lt;/A&gt;&amp;nbsp;which adds support for a similar board. So I have taken that config and adapted to LPC55s36.&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;source [find target/swj-dp.tcl]

if { [info exists CHIPNAME] } {
	set _CHIPNAME $CHIPNAME
} else {
	set _CHIPNAME lpc55s36
}

#
# JTAG mode TAP
#
if { [info exists M33_JTAG_TAPID] } {
	set _JTAG_TAPID $M33_JTAG_TAPID
} else {
	set _JTAG_TAPID 0x4ba00477
}

#
# SWD mode TAP
#
if { [info exists M33_SWD_TAPID] } {
	set _SWD_TAPID $M33_SWD_TAPID
} else {
#	set _SWD_TAPID 0x2ba01477
	set _SWD_TAPID 0x0be12477
	#set _SWD_TAPID 0x410fd214
}

if { [using_jtag] } {
	set _CPUTAPID $_JTAG_TAPID
} {
	set _CPUTAPID $_SWD_TAPID
}

swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
				-expected-id $_CPUTAPID
dap create $_CHIPNAME.m4.dap -chain-position $_CHIPNAME.m4
target create $_CHIPNAME.m4 cortex_m -dap $_CHIPNAME.m4.dap

# LPCSSS36-EVK has 112 KB SRAM
if { [info exists WORKAREASIZE] } {
	set _WORKAREASIZE $WORKAREASIZE
} else {
	set _WORKAREASIZE 0x1C000
}
$_CHIPNAME.m4 configure -work-area-phys 0x20000000 \
			-work-area-size $_WORKAREASIZE -work-area-backup 0

#if {![using_hla]} {
#   # on this CPU we should use VECTRESET to perform a soft reset and
#   # manually reset the periphery
#   # SRST or SYSRESETREQ disable the debug interface for the time of
#   # the reset and will not fit our requirements for a consistent debug
#   # session
#   cortex_m reset_config vectreset
#}

cortex_m reset_config sysresetreq
adapter speed 400

#adapter srst delay 100
#adapter srst pulse_width 100
#reset_config  srst_nogate

# reset_config srst_only&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Then running with:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;sudo openocd -d -f interface/cmsis-dap.cfg -f lpc55s36.cfg -c "program [FILE] verify reset exit"&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;And eventually getting:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;Open On-Chip Debugger 0.12.0
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
User : 3 3 options.c:52 configuration_output_handler(): debug_level: 3
User : 4 4 options.c:52 configuration_output_handler(): 
Debug: 5 4 options.c:233 add_default_dirs(): bindir=/usr/bin
Debug: 6 4 options.c:234 add_default_dirs(): pkgdatadir=/usr/share/openocd
Debug: 7 4 options.c:235 add_default_dirs(): exepath=/usr/bin
Debug: 8 4 options.c:236 add_default_dirs(): bin2data=../share/openocd
Debug: 9 4 configuration.c:33 add_script_search_dir(): adding /root/.config/openocd
Debug: 10 4 configuration.c:33 add_script_search_dir(): adding /root/.openocd
Debug: 11 4 configuration.c:33 add_script_search_dir(): adding /usr/bin/../share/openocd/site
Debug: 12 4 configuration.c:33 add_script_search_dir(): adding /usr/bin/../share/openocd/scripts
Debug: 13 4 command.c:155 script_debug(): command - ocd_find interface/cmsis-dap.cfg
Debug: 14 4 configuration.c:88 find_file(): found /usr/bin/../share/openocd/scripts/interface/cmsis-dap.cfg
Debug: 15 4 command.c:155 script_debug(): command - adapter driver cmsis-dap
Debug: 16 5 command.c:155 script_debug(): command - ocd_find ./config//lpc55s36.cfg
Debug: 17 5 configuration.c:88 find_file(): found ./config//lpc55s36.cfg
Debug: 18 5 command.c:155 script_debug(): command - ocd_find target/swj-dp.tcl
Debug: 19 5 configuration.c:88 find_file(): found /usr/bin/../share/openocd/scripts/target/swj-dp.tcl
Debug: 20 5 command.c:155 script_debug(): command - transport select
Info : 21 5 transport.c:265 jim_transport_select(): auto-selecting first available session transport "swd". To override use 'transport select &amp;lt;transport&amp;gt;'.
Debug: 22 5 command.c:155 script_debug(): command - transport select
Debug: 23 5 command.c:155 script_debug(): command - expr  [ string first "jtag" $_TRANSPORT ] != -1 
Debug: 24 5 command.c:155 script_debug(): command - transport select
Debug: 25 5 command.c:155 script_debug(): command - expr  [ string first "jtag" $_TRANSPORT ] != -1 
Debug: 26 5 command.c:155 script_debug(): command - transport select
Debug: 27 5 command.c:155 script_debug(): command - expr  [ string first "swd" $_TRANSPORT ] != -1 
Debug: 28 5 command.c:155 script_debug(): command - swd newdap lpc55s36 m4 -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x410fd214
Debug: 29 5 tcl.c:557 jim_newtap_cmd(): Creating New Tap, Chip: lpc55s36, Tap: m4, Dotted: lpc55s36.m4, 8 params
Debug: 30 6 core.c:1474 jtag_tap_init(): Created Tap: lpc55s36.m4 @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
Debug: 31 6 command.c:155 script_debug(): command - dap create lpc55s36.m4.dap -chain-position lpc55s36.m4
Debug: 32 6 command.c:155 script_debug(): command - target create lpc55s36.m4 cortex_m -dap lpc55s36.m4.dap
Debug: 33 6 command.c:289 register_command(): command 'tpiu' is already registered
Debug: 34 6 command.c:289 register_command(): command 'rtt' is already registered
Debug: 35 6 command.c:155 script_debug(): command - lpc55s36.m4 configure -work-area-phys 0x20000000 -work-area-size 0x1C000 -work-area-backup 0
Debug: 36 6 target.c:2199 target_free_all_working_areas_restore(): freeing all working areas
Debug: 37 6 target.c:2199 target_free_all_working_areas_restore(): freeing all working areas
Debug: 38 6 target.c:2199 target_free_all_working_areas_restore(): freeing all working areas
Debug: 39 6 command.c:155 script_debug(): command - cortex_m reset_config sysresetreq
Debug: 40 6 command.c:155 script_debug(): command - adapter speed 400
Debug: 41 6 adapter.c:251 adapter_config_khz(): handle adapter khz
Debug: 42 6 adapter.c:215 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 43 6 adapter.c:215 adapter_khz_to_speed(): convert khz to adapter specific speed value
User : 44 6 options.c:52 configuration_output_handler(): adapter speed: 400 kHz
User : 45 6 options.c:52 configuration_output_handler(): 
Debug: 46 7 command.c:155 script_debug(): command - init
Debug: 47 7 command.c:155 script_debug(): command - target init
Debug: 48 7 command.c:155 script_debug(): command - target names
Debug: 49 7 command.c:155 script_debug(): command - lpc55s36.m4 cget -event gdb-flash-erase-start
Debug: 50 7 command.c:155 script_debug(): command - lpc55s36.m4 configure -event gdb-flash-erase-start reset init
Debug: 51 7 command.c:155 script_debug(): command - lpc55s36.m4 cget -event gdb-flash-write-end
Debug: 52 7 command.c:155 script_debug(): command - lpc55s36.m4 configure -event gdb-flash-write-end reset halt
Debug: 53 7 command.c:155 script_debug(): command - lpc55s36.m4 cget -event gdb-attach
Debug: 54 7 command.c:155 script_debug(): command - lpc55s36.m4 configure -event gdb-attach halt 1000
Debug: 55 7 target.c:1657 handle_target_init_command(): Initializing targets...
Debug: 56 7 semihosting_common.c:109 semihosting_common_init():  
Debug: 57 35 cmsis_dap_usb_bulk.c:170 cmsis_dap_usb_open(): enumerating interfaces of 0x1d6b:0x0002
Debug: 58 63 cmsis_dap_usb_bulk.c:170 cmsis_dap_usb_open(): enumerating interfaces of 0x1d6b:0x0003
Debug: 59 65 cmsis_dap_usb_bulk.c:150 cmsis_dap_usb_open(): found product string of 0x1fc9:0x0143 'MCU-LINK on-board (r0C7) CMSIS-DAP V2.245'
Debug: 60 65 cmsis_dap_usb_bulk.c:170 cmsis_dap_usb_open(): enumerating interfaces of 0x1fc9:0x0143
Debug: 61 65 cmsis_dap_usb_bulk.c:217 cmsis_dap_usb_open(): found interface 0 string 'MCU-LINK on-board (r0C7) CMSIS-DAP V2.245'
Debug: 62 65 cmsis_dap_usb_bulk.c:237 cmsis_dap_usb_open(): skipping interface 0, endpoint[0] is not bulk out
Debug: 63 66 cmsis_dap_usb_bulk.c:237 cmsis_dap_usb_open(): skipping interface 1, endpoint[0] is not bulk out
Debug: 64 67 cmsis_dap_usb_bulk.c:230 cmsis_dap_usb_open(): skipping interface 2, has only 1 endpoints
Debug: 65 67 cmsis_dap_usb_bulk.c:276 cmsis_dap_usb_open(): skipping interface 3, class 10 subclass 0 protocol 0
Debug: 66 68 cmsis_dap_usb_bulk.c:237 cmsis_dap_usb_open(): skipping interface 4, endpoint[0] is not bulk out
Debug: 67 69 cmsis_dap_usb_bulk.c:170 cmsis_dap_usb_open(): enumerating interfaces of 0x2109:0x3431
Debug: 68 71 cmsis_dap_usb_bulk.c:170 cmsis_dap_usb_open(): enumerating interfaces of 0x1d6b:0x0002
Info : 69 172 cmsis_dap.c:1027 cmsis_dap_get_caps_info(): CMSIS-DAP: SWD supported
Info : 70 172 cmsis_dap.c:1027 cmsis_dap_get_caps_info(): CMSIS-DAP: JTAG supported
Info : 71 172 cmsis_dap.c:1027 cmsis_dap_get_caps_info(): CMSIS-DAP: Atomic commands supported
Info : 72 179 cmsis_dap.c:1004 cmsis_dap_get_version_info(): CMSIS-DAP: FW Version = 1.10
Info : 73 186 cmsis_dap.c:989 cmsis_dap_get_serial_info(): CMSIS-DAP: Serial# = OKF3A0JHHR30I
Info : 74 191 cmsis_dap.c:1156 cmsis_dap_swd_open(): CMSIS-DAP: Interface Initialised (SWD)
Debug: 75 195 cmsis_dap.c:1224 cmsis_dap_init(): CMSIS-DAP: Packet Size = 1024
Debug: 76 199 cmsis_dap.c:1238 cmsis_dap_init(): CMSIS-DAP: Packet Count = 4
Debug: 77 199 cmsis_dap.c:1241 cmsis_dap_init(): Allocating FIFO for 3 pending packets
Info : 78 203 cmsis_dap.c:1060 cmsis_dap_get_status(): SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 0 nTRST = 0 nRESET = 1
Info : 79 225 cmsis_dap.c:1292 cmsis_dap_init(): CMSIS-DAP: Interface ready
Debug: 80 225 adapter.c:215 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 81 225 adapter.c:219 adapter_khz_to_speed(): have adapter set up
Debug: 82 229 adapter.c:215 adapter_khz_to_speed(): convert khz to adapter specific speed value
Debug: 83 229 adapter.c:219 adapter_khz_to_speed(): have adapter set up
Info : 84 229 adapter.c:179 adapter_init(): clock speed 400 kHz
Debug: 85 229 openocd.c:134 handle_init_command(): Debug Adapter init complete
Debug: 86 229 command.c:155 script_debug(): command - transport init
Debug: 87 229 transport.c:219 handle_transport_init(): handle_transport_init
Debug: 88 229 command.c:155 script_debug(): command - dap init
Debug: 89 229 arm_dap.c:97 dap_init_all(): Initializing all DAPs ...
Debug: 90 229 arm_dap.c:121 dap_init_all(): DAP lpc55s36.m4 configured by default to use ADIv5 protocol
Debug: 91 237 cmsis_dap.c:1100 cmsis_dap_swd_switch_seq(): JTAG-to-SWD
Info : 92 249 adi_v5_swd.c:370 swd_connect_single(): SWD DPIDR 0x6ba02477
Debug: 93 253 arm_adi_v5.c:679 dap_dp_init(): lpc55s36.m4.dap
Debug: 94 253 arm_adi_v5.c:711 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 95 253 arm_adi_v5.h:638 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
Debug: 96 257 arm_adi_v5.c:719 dap_dp_init(): DAP: wait CSYSPWRUPACK
Debug: 97 257 arm_adi_v5.h:638 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000
Debug: 98 261 cmsis_dap.c:808 cmsis_dap_swd_write_from_queue(): refusing to enable sticky overrun detection
Debug: 99 265 openocd.c:151 handle_init_command(): Examining targets...
Debug: 100 265 target.c:1843 target_call_event_callbacks(): target event 19 (examine-start) for core lpc55s36.m4
Debug: 101 265 arm_adi_v5.c:1095 dap_get_ap(): refcount AP#0x0 get 1
Debug: 102 269 arm_adi_v5.c:1038 dap_find_get_ap(): Found MEM-AP AHB3 at AP index: 0 (IDR=0x84770001)
Debug: 103 277 arm_adi_v5.c:825 mem_ap_init(): MEM_AP Packed Transfers: enabled
Debug: 104 277 arm_adi_v5.c:836 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
Debug: 105 281 target.c:2628 target_read_u32(): address: 0xe000ed00, value: 0x410fd214
Info : 106 281 cortex_m.c:2369 cortex_m_examine(): [lpc55s36.m4] Cortex-M33 r0p4 processor detected
Debug: 107 281 cortex_m.c:2384 cortex_m_examine(): [lpc55s36.m4] cpuid: 0x410fd214
Debug: 108 285 target.c:2628 target_read_u32(): address: 0xe000ef40, value: 0x10110021
Debug: 109 289 target.c:2628 target_read_u32(): address: 0xe000ef44, value: 0x11000011
Debug: 110 289 cortex_m.c:2401 cortex_m_examine(): [lpc55s36.m4] Cortex-M33 floating point feature FPv5_SP found
Debug: 111 293 target.c:2628 target_read_u32(): address: 0xe000efb8, value: 0x0000000f
Debug: 112 297 target.c:2628 target_read_u32(): address: 0xe000edf0, value: 0x01000001
Debug: 113 297 target.c:2716 target_write_u32(): address: 0xe000edfc, value: 0x01000000
Debug: 114 306 target.c:2628 target_read_u32(): address: 0xe0002000, value: 0x10000081
Debug: 115 306 target.c:2716 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 116 311 target.c:2716 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 117 315 target.c:2716 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 118 319 target.c:2716 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 119 323 target.c:2716 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 120 328 target.c:2716 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 121 333 target.c:2716 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 122 338 target.c:2716 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 123 343 cortex_m.c:2488 cortex_m_examine(): [lpc55s36.m4] FPB fpcr 0x10000081, numcode 8, numlit 0
Debug: 124 348 target.c:2628 target_read_u32(): address: 0xe0001000, value: 0x40000000
Debug: 125 348 cortex_m.c:2187 cortex_m_dwt_setup(): [lpc55s36.m4] DWT_CTRL: 0x40000000
Debug: 126 353 target.c:2628 target_read_u32(): address: 0xe0001fbc, value: 0x47701a02
Debug: 127 353 cortex_m.c:2194 cortex_m_dwt_setup(): [lpc55s36.m4] DWT_DEVARCH: 0x47701a02
Debug: 128 353 target.c:2716 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 129 357 target.c:2716 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 130 361 target.c:2716 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 131 365 target.c:2716 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 132 370 cortex_m.c:2241 cortex_m_dwt_setup(): [lpc55s36.m4] DWT dwtcr 0x40000000, comp 4, watch/trigger
Info : 133 370 cortex_m.c:2498 cortex_m_examine(): [lpc55s36.m4] target has 8 breakpoints, 4 watchpoints
Debug: 134 370 target.c:1843 target_call_event_callbacks(): target event 21 (examine-end) for core lpc55s36.m4
Debug: 135 370 command.c:155 script_debug(): command - flash init
Debug: 136 370 tcl.c:1375 handle_flash_init_command(): Initializing flash devices...
Debug: 137 370 command.c:155 script_debug(): command - nand init
Debug: 138 370 tcl.c:487 handle_nand_init_command(): Initializing NAND devices...
Debug: 139 371 command.c:155 script_debug(): command - pld init
Debug: 140 371 pld.c:194 handle_pld_init_command(): Initializing PLDs...
Debug: 141 371 command.c:155 script_debug(): command - tpiu init
Info : 142 371 gdb_server.c:3791 gdb_target_start(): starting gdb server for lpc55s36.m4 on 3333
Info : 143 371 server.c:297 add_service(): Listening on port 3333 for gdb connections
Debug: 144 371 command.c:155 script_debug(): command - reset init
Debug: 145 375 target.c:1862 target_call_reset_callbacks(): target reset 3 (init)
Debug: 146 375 command.c:155 script_debug(): command - expr [catch {ocd_process_reset_inner $MODE} result] == 0
Debug: 147 376 command.c:155 script_debug(): command - target names
Debug: 148 376 command.c:155 script_debug(): command - lpc55s36.m4 invoke-event reset-start
Debug: 149 376 command.c:155 script_debug(): command - transport select
Debug: 150 376 command.c:155 script_debug(): command - expr  [ string first "jtag" $_TRANSPORT ] != -1 
Debug: 151 376 command.c:155 script_debug(): command - transport select
Debug: 152 376 command.c:155 script_debug(): command - expr  [ string first "jtag" $_TRANSPORT ] != -1 
Debug: 153 376 command.c:155 script_debug(): command - lpc55s36.m4 invoke-event examine-start
Debug: 154 376 command.c:155 script_debug(): command - lpc55s36.m4 arp_examine allow-defer
Debug: 155 383 arm_adi_v5.c:825 mem_ap_init(): MEM_AP Packed Transfers: enabled
Debug: 156 383 arm_adi_v5.c:836 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
Debug: 157 383 command.c:155 script_debug(): command - lpc55s36.m4 invoke-event examine-end
Debug: 158 383 command.c:155 script_debug(): command - lpc55s36.m4 invoke-event reset-assert-pre
Debug: 159 383 command.c:155 script_debug(): command - transport select
Debug: 160 383 command.c:155 script_debug(): command - expr  [ string first "jtag" $_TRANSPORT ] != -1 
Debug: 161 384 command.c:155 script_debug(): command - lpc55s36.m4 arp_reset assert 1
Debug: 162 384 target.c:2199 target_free_all_working_areas_restore(): freeing all working areas
Debug: 163 384 cortex_m.c:1401 cortex_m_assert_reset(): [lpc55s36.m4] target-&amp;gt;state: running, examined
Debug: 164 391 cortex_m.c:1516 cortex_m_assert_reset(): [lpc55s36.m4] Using Cortex-M SYSRESETREQ
Debug: 165 395 cmsis_dap.c:872 cmsis_dap_swd_read_process(): SWD ack not OK @ 4 FAULT
Debug: 166 395 cortex_m.c:1529 cortex_m_assert_reset(): [lpc55s36.m4] Ignoring AP write error right after reset
Debug: 167 395 arm_adi_v5.c:754 dap_dp_init_or_reconnect(): lpc55s36.m4.dap
Debug: 168 399 arm_adi_v5.c:679 dap_dp_init(): lpc55s36.m4.dap
Debug: 169 399 arm_adi_v5.c:711 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 170 399 arm_adi_v5.h:638 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
Debug: 171 403 cmsis_dap.c:872 cmsis_dap_swd_read_process(): SWD ack not OK @ 0 FAULT
Error: 172 403 cortex_m.c:1533 cortex_m_assert_reset(): [lpc55s36.m4] DP initialisation failed
Debug: 173 454 cortex_m.c:986 cortex_m_halt(): [lpc55s36.m4] target-&amp;gt;state: reset
Debug: 174 454 command.c:155 script_debug(): command - lpc55s36.m4 invoke-event reset-assert-post
Debug: 175 454 command.c:155 script_debug(): command - lpc55s36.m4 invoke-event reset-deassert-pre
Debug: 176 454 command.c:155 script_debug(): command - transport select
Debug: 177 454 command.c:155 script_debug(): command - expr  [ string first "jtag" $_TRANSPORT ] != -1 
Debug: 178 454 command.c:155 script_debug(): command - lpc55s36.m4 arp_reset deassert 1
Debug: 179 455 target.c:2199 target_free_all_working_areas_restore(): freeing all working areas
Debug: 180 455 cortex_m.c:1569 cortex_m_deassert_reset(): [lpc55s36.m4] target-&amp;gt;state: reset, examined
Debug: 181 457 core.c:640 adapter_system_reset(): SRST line released
Debug: 182 457 command.c:155 script_debug(): command - lpc55s36.m4 invoke-event reset-deassert-post
Debug: 183 458 command.c:155 script_debug(): command - transport select
Debug: 184 458 command.c:155 script_debug(): command - expr  [ string first "jtag" $_TRANSPORT ] != -1 
Debug: 185 458 command.c:155 script_debug(): command - lpc55s36.m4 was_examined
Debug: 186 458 command.c:155 script_debug(): command - lpc55s36.m4 arp_waitstate halted 1000
Debug: 187 469 cmsis_dap.c:1100 cmsis_dap_swd_switch_seq(): JTAG-to-SWD
Info : 188 481 adi_v5_swd.c:370 swd_connect_single(): SWD DPIDR 0x6ba02477
Debug: 189 485 arm_adi_v5.c:679 dap_dp_init(): lpc55s36.m4.dap
Debug: 190 485 arm_adi_v5.c:711 dap_dp_init(): DAP: wait CDBGPWRUPACK
Debug: 191 485 arm_adi_v5.h:638 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
Debug: 192 489 arm_adi_v5.c:719 dap_dp_init(): DAP: wait CSYSPWRUPACK
Debug: 193 489 arm_adi_v5.h:638 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000
Debug: 194 493 cmsis_dap.c:808 cmsis_dap_swd_write_from_queue(): refusing to enable sticky overrun detection
Debug: 195 501 target.c:3286 target_wait_state(): waiting for target halted...
Debug: 196 505 cortex_m.c:921 cortex_m_poll(): [lpc55s36.m4] Exit from reset with dcb_dhcsr 0x1000001
Debug: 197 509 cortex_m.c:588 cortex_m_endreset_event(): [lpc55s36.m4] DCB_DEMCR = 0x01000501
Debug: 198 513 target.c:2716 target_write_u32(): address: 0xe0002000, value: 0x00000003
Debug: 199 521 target.c:2628 target_read_u32(): address: 0xe0002000, value: 0x10000081
Debug: 200 521 target.c:2716 target_write_u32(): address: 0xe0002008, value: 0x00000000
Debug: 201 525 target.c:2716 target_write_u32(): address: 0xe000200c, value: 0x00000000
Debug: 202 529 target.c:2716 target_write_u32(): address: 0xe0002010, value: 0x00000000
Debug: 203 533 target.c:2716 target_write_u32(): address: 0xe0002014, value: 0x00000000
Debug: 204 538 target.c:2716 target_write_u32(): address: 0xe0002018, value: 0x00000000
Debug: 205 543 target.c:2716 target_write_u32(): address: 0xe000201c, value: 0x00000000
Debug: 206 547 target.c:2716 target_write_u32(): address: 0xe0002020, value: 0x00000000
Debug: 207 551 target.c:2716 target_write_u32(): address: 0xe0002024, value: 0x00000000
Debug: 208 555 target.c:2716 target_write_u32(): address: 0xe0001020, value: 0x00000000
Debug: 209 559 target.c:2716 target_write_u32(): address: 0xe0001024, value: 0x00000000
Debug: 210 563 target.c:2716 target_write_u32(): address: 0xe0001028, value: 0x00000000
Debug: 211 567 target.c:2716 target_write_u32(): address: 0xe0001030, value: 0x00000000
Debug: 212 571 target.c:2716 target_write_u32(): address: 0xe0001034, value: 0x00000000
Debug: 213 575 target.c:2716 target_write_u32(): address: 0xe0001038, value: 0x00000000
Debug: 214 579 target.c:2716 target_write_u32(): address: 0xe0001040, value: 0x00000000
Debug: 215 583 target.c:2716 target_write_u32(): address: 0xe0001044, value: 0x00000000
Debug: 216 587 target.c:2716 target_write_u32(): address: 0xe0001048, value: 0x00000000
Debug: 217 591 target.c:2716 target_write_u32(): address: 0xe0001050, value: 0x00000000
Debug: 218 596 target.c:2716 target_write_u32(): address: 0xe0001054, value: 0x00000000
Debug: 219 601 target.c:2716 target_write_u32(): address: 0xe0001058, value: 0x00000000
Debug: 220 1005 log.c:412 gdb_timeout_warning(): keep_alive() was not invoked in the 1000 ms timelimit (1005 ms). This may cause trouble with GDB connections.
Error: 221 1505 target.c:3294 target_wait_state(): timed out while waiting for target halted
Debug: 222 1505 command.c:155 script_debug(): command - lpc55s36.m4 curstate
Debug: 223 1506 command.c:544 run_command(): Command 'reset' failed with error code -4
Debug: 224 1506 command.c:155 script_debug(): command - echo ** Unable to reset target **
User : 225 1509 command.c:685 handle_echo(): ** Unable to reset target **
Debug: 226 1509 command.c:155 script_debug(): command - shutdown error
User : 227 1513 server.c:758 handle_shutdown_command(): shutdown command invoked
Debug: 228 1513 command.c:544 run_command(): Command 'shutdown' failed with error code -4
User : 229 1514 command.c:608 command_run_line(): 
Debug: 230 1514 arm_adi_v5.c:1120 dap_put_ap(): refcount AP#0x0 put 0
Debug: 231 1514 target.c:2199 target_free_all_working_areas_restore(): freeing all working areas
Debug: 232 1522 cmsis_dap.c:1110 cmsis_dap_swd_switch_seq(): SWD-to-JTAG
Oopsies, trying again in 1 second&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Has anyone managed to flash this board w/ OpenOCD? Otherwise, what are the alternatives given that I need to be able to programatically do it from a ARM32 Linux machine using SWD.&lt;/P&gt;</description>
      <pubDate>Wed, 24 Jan 2024 03:53:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1794295#M55221</guid>
      <dc:creator>rolandgroza</dc:creator>
      <dc:date>2024-01-24T03:53:42Z</dc:date>
    </item>
    <item>
      <title>Re: Flash LPC55s36 with OpenOCD</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1794991#M55224</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;This is an application note focusing on the SWD programming, pls check if it is helpful.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Thu, 25 Jan 2024 01:27:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1794991#M55224</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2024-01-25T01:27:38Z</dc:date>
    </item>
    <item>
      <title>Re: Flash LPC55s36 with OpenOCD</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1795005#M55225</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/26034"&gt;@xiangjun_rong&lt;/a&gt;&amp;nbsp;. Thanks for sharing that. There's a note about some source code for the reference impl. which could be shared, would that be possible? And can that be used for flashing and resetting the MCU?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 25 Jan 2024 01:55:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1795005#M55225</guid>
      <dc:creator>rolandgroza</dc:creator>
      <dc:date>2024-01-25T01:55:37Z</dc:date>
    </item>
    <item>
      <title>Re: Flash LPC55s36 with OpenOCD</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1795008#M55226</link>
      <description>&lt;P&gt;Also, if you check&amp;nbsp;&lt;A href="https://github.com/openocd-org/openocd/blob/151b743714382120dbe0dee0e0eeb75826ef5b3a/src/flash/nor/lpc2000.c," target="_blank"&gt;https://github.com/openocd-org/openocd/blob/151b743714382120dbe0dee0e0eeb75826ef5b3a/src/flash/nor/lpc2000.c,&lt;/A&gt;&amp;nbsp;are any of those impl. close enough to how the logic/algo for flashing lpc553x is? I'm thinking of modifying the source to support this chip too.&lt;/P&gt;</description>
      <pubDate>Thu, 25 Jan 2024 01:58:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1795008#M55226</guid>
      <dc:creator>rolandgroza</dc:creator>
      <dc:date>2024-01-25T01:58:12Z</dc:date>
    </item>
    <item>
      <title>Re: Flash LPC55s36 with OpenOCD</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1795031#M55228</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;For the programming on-chip flash of LPC55s36, the ROM provides the API function to program flash.&lt;/P&gt;
&lt;P&gt;Pls download the reference manual of LPC55S36 from the link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc5500-arm-cortex-m33/lpc553x-s3x-advanced-analog-armcortex-m33-based-mcu-family:LPC553x" target="_blank"&gt;https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc5500-arm-cortex-m33/lpc553x-s3x-advanced-analog-armcortex-m33-based-mcu-family:LPC553x&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Refer to section 28.2.1 ROM API structure.&lt;/P&gt;
&lt;P&gt;BTW, pls download SDK package from the link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://mcuxpresso.nxp.com/en/welcome" target="_blank"&gt;https://mcuxpresso.nxp.com/en/welcome&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;There is flash operation example&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="xiangjun_rong_0-1706150393943.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/259979iA263907FF4568277/image-size/medium?v=v2&amp;amp;px=400" role="button" title="xiangjun_rong_0-1706150393943.png" alt="xiangjun_rong_0-1706150393943.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Thu, 25 Jan 2024 02:40:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1795031#M55228</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2024-01-25T02:40:38Z</dc:date>
    </item>
    <item>
      <title>Re: Flash LPC55s36 with OpenOCD</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1806374#M55411</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/228590"&gt;@rolandgroza&lt;/a&gt; ! Thank you for the cfg file. I used it and have the same error. Have you managed to make it work?&lt;/P&gt;</description>
      <pubDate>Wed, 14 Feb 2024 08:37:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1806374#M55411</guid>
      <dc:creator>leannee</dc:creator>
      <dc:date>2024-02-14T08:37:55Z</dc:date>
    </item>
    <item>
      <title>Re: Flash LPC55s36 with OpenOCD</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1810545#M55449</link>
      <description>&lt;P&gt;We have reached out to one of the the OpenOCD contributors and he's helped impl. the flash driver for this model:&amp;nbsp;&lt;A href="https://github.com/transcelestial/openocd" target="_blank"&gt;https://github.com/transcelestial/openocd&lt;/A&gt;.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 19 Feb 2024 04:45:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Flash-LPC55s36-with-OpenOCD/m-p/1810545#M55449</guid>
      <dc:creator>rolandgroza</dc:creator>
      <dc:date>2024-02-19T04:45:25Z</dc:date>
    </item>
  </channel>
</rss>

