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    <title>topic Re: I2C Interrupts not clearing in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/I2C-Interrupts-not-clearing/m-p/1754858#M54674</link>
    <description>&lt;P&gt;This issue has been resolved. There were a couple of issues with the interrupt handler and I had also configured the system timer incorrectly.&lt;/P&gt;</description>
    <pubDate>Thu, 09 Nov 2023 09:36:32 GMT</pubDate>
    <dc:creator>EmptyBoatt</dc:creator>
    <dc:date>2023-11-09T09:36:32Z</dc:date>
    <item>
      <title>I2C Interrupts not clearing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/I2C-Interrupts-not-clearing/m-p/1754164#M54663</link>
      <description>&lt;P&gt;I am currently attempting to write from a LPC1549JBD64 on a custom board to a number of I2C devices.&lt;/P&gt;&lt;P&gt;The code I have written is based on the LPCOpen "periph_i2cm_interrupt"&lt;/P&gt;&lt;P&gt;Initially I ran into an issue where after the master would transmit 2bytes (1 addr, 1 data) then the second ACK from the slave was not received. This resulted in SCL remaining low indefinitely and MSTSTATE in the STAT register to stay at TRANSMIT_READY, not returning to IDLE.&lt;/P&gt;&lt;P&gt;This was solved by placing a short delay after the __WFI() function in the 'waitForI2CXferComplete()', allowing time for the slave's ACK to be read. And the clock and registers to return to an idle state.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have subsequently ran into an issue where the values in INTENSET cannot be cleared, resulting in the I2C interrupt handler forcing the code into an infinite loop. I have tried setting all the bits in INTENSET to 0, also writing directly to the appropriate bits in INTENCLR, though this does not clear the corresponding interrupt enables.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am not sure what to do to overcome this, I am relatively new to NXP's systems and I2C so any help at all would be greatly appreciated.&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;Relevant code is enclosed, if there is any more information need please ask.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void setupI2CMaster(void)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; initI2CPinMux();&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; Chip_I2C_Init(LPC_I2C0);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; Chip_I2C_SetClockDiv(LPC_I2C0, I2C_CLK_DIVIDER);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; Chip_I2CM_SetBusSpeed(LPC_I2C0, I2C_BITRATE);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; Chip_I2CM_Enable(LPC_I2C0);&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void waitForI2CXferComplete(I2CM_XFER_T *xferRecPtr)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; while(xferRecPtr-&amp;gt;status == I2CM_STATUS_BUSY)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; {&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; __WFI();&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Delay_us(1); // Delay prevents final ACK being ignored&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void setupXferRecAndExecute(uint8_t SlvAddr,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; uint8_t *txBuffPtr,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; uint8_t txSize,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; uint8_t *rxBuffPtr,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; uint8_t rxSize)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; i2cmXferRec.slaveAddr&amp;nbsp; &amp;nbsp;= SlvAddr;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; i2cmXferRec.status&amp;nbsp; &amp;nbsp; &amp;nbsp; = 0;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; i2cmXferRec.txSz&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; = txSize;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; i2cmXferRec.rxSz&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; = rxSize;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; i2cmXferRec.txBuff&amp;nbsp; &amp;nbsp; &amp;nbsp; = txBuffPtr;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; i2cmXferRec.rxBuff&amp;nbsp; &amp;nbsp; &amp;nbsp; = rxBuffPtr;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; Chip_I2CM_Xfer(LPC_I2C0, &amp;amp;i2cmXferRec);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; Chip_I2C_EnableInt(LPC_I2C0, I2C_INTENSET_MSTPENDING | I2C_INTENSET_MSTRARBLOSS | I2C_INTENSET_MSTSTSTPERR);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; waitForI2CXferComplete(&amp;amp;i2cmXferRec);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; Chip_I2C_ClearInt(LPC_I2C0, I2C_INTENSET_MSTPENDING | I2C_INTENSET_MSTRARBLOSS | I2C_INTENSET_MSTSTSTPERR);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; /*&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; LPC_I2C0-&amp;gt;INTENCLR = I2C_INTENSET_MSTPENDING;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; LPC_I2C0-&amp;gt;INTENCLR = I2C_INTENSET_MSTRARBLOSS;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; LPC_I2C0-&amp;gt;INTENCLR = I2C_INTENSET_MSTSTSTPERR;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; LPC_I2C0-&amp;gt;INTENSET = 0;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;*/&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; Delay_us(100); // Delay must be present for continued operation. Without it collisions(?) can occur.&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;void sendI2CConfig(void)&lt;/DIV&gt;&lt;DIV&gt;{&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; setupXferRecAndExecute( POT_ADDR_7BIT,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; configPotArray, 1,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; configPotReceive, 0);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; setupXferRecAndExecute( DAC_ADDR_7BIT,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; configDACArray, 2,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; configDACReceive, 0);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; setupXferRecAndExecute( DAC_ADDR_7BIT,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; modeDACArray, 2,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; modeDACReceive, 0);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; setupXferRecAndExecute( ADC_ADDR_7BIT,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; configADCArray, 2,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; configADCReceive, 0);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;}&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 08 Nov 2023 11:00:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/I2C-Interrupts-not-clearing/m-p/1754164#M54663</guid>
      <dc:creator>EmptyBoatt</dc:creator>
      <dc:date>2023-11-08T11:00:13Z</dc:date>
    </item>
    <item>
      <title>Re: I2C Interrupts not clearing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/I2C-Interrupts-not-clearing/m-p/1754858#M54674</link>
      <description>&lt;P&gt;This issue has been resolved. There were a couple of issues with the interrupt handler and I had also configured the system timer incorrectly.&lt;/P&gt;</description>
      <pubDate>Thu, 09 Nov 2023 09:36:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/I2C-Interrupts-not-clearing/m-p/1754858#M54674</guid>
      <dc:creator>EmptyBoatt</dc:creator>
      <dc:date>2023-11-09T09:36:32Z</dc:date>
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