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    <title>topic Correctly powering LPC553x: VBAT, VDDIO, &amp;quot;output capacitor&amp;quot; (LPC5536) in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1749476#M54589</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I have doubts making sense of the documentation regarding correctly powering the LPC5536 and I don't want to guess. Thus I'm asking for help.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;First, where should I connect VBAT pin to?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;The "product data sheet" states that this pin is a "battery supply". I don't have a battery in my design. AN13528 ("Using LDO feature...") does not show VBAT in any figure. Only VDD_MAIN is shown. AN13707 ("Hardware design guidelines") requests that "VBAT pin requires a &lt;STRONG&gt;separate &lt;/STRONG&gt;power supply". Does that mean I cannot connect VDD_MAIN and VBAT on the PCB? On LPC5536-EVK schematic both VDD_MAIN (schematic: "MCU_MAIN") and VBAT (schematic "MCU_VBAT") are connected to the same 3V3 power supply line, though.&amp;nbsp;That's confusing.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_0-1698748084233.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/247713i12F5BE5810C0C1DA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_0-1698748084233.png" alt="danielholala_0-1698748084233.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I'm planning&lt;/STRONG&gt; on connecting both VDD_MAIN and VBAT to the same 3V3 supply but using separate banks of decoupling capacitors as seen in AN13707, Figure 1:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_0-1698749468263.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/247724i2E7DC4B9BA55F36B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_0-1698749468263.png" alt="danielholala_0-1698749468263.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Does that make sense?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Second, what about decoupling capacitors for VDDIO pins?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;AN13707 ("Hardware design guidelines") does not request (let alone discuss) decoupling capacitors for VDDIO pins. Though, LPC5536-EVK schematic shows 9 decoupling capacitors for the 6 VDDIO pins.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_1-1698748231797.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/247714iE62DA4B61BD06DDF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_1-1698748231797.png" alt="danielholala_1-1698748231797.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I'm planning&lt;/STRONG&gt; a single 100 nF capacitor at each VDDIO pin.&lt;/P&gt;&lt;P&gt;Is that sufficient?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Third, what is the "output capacitor"?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;AN13528 ("Using LDO feature...") states that "The &lt;STRONG&gt;minimum&lt;/STRONG&gt; &lt;STRONG&gt;value&lt;/STRONG&gt; of the output capacitor is &lt;STRONG&gt;10 μF&lt;/STRONG&gt;". There are C1 - C4 shown in the schematics and tables, e.g., see Figure 2 below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_2-1698748345988.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/247715iB39CF9CF943B66AA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_2-1698748345988.png" alt="danielholala_2-1698748345988.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;The application note does not explicitly state which one is the output capacitor. First candidate is C1 but it is listed as typically 4.7 uF , see Table 4. This does not meet the minimum requirement quoted above. Next candidate is C2 as it has a minimum of 10 uF. However, is is connected to the power supply and as such considered an "input capacitor". I don't want to guess. Please tell me which one it is the output capacitor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I'm planning&lt;/STRONG&gt; on using a 10 μF ceramic capacitor for C1 (and for C2, to simplify component variety).&lt;/P&gt;&lt;P&gt;Does that fit?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks.&lt;BR /&gt;Best regards,&lt;BR /&gt;Daniel&lt;/P&gt;&lt;P&gt;Links for your reference:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;A href="https://www.nxp.com/docs/en/nxp/application-notes/AN13528.pdf" target="_self"&gt;AN13528 ("Using LDO feature...")&lt;/A&gt;&lt;/LI&gt;&lt;LI&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13707.pdf" target="_self"&gt;AN13707 ("Hardware design guidelines")&lt;/A&gt;&lt;/LI&gt;&lt;LI&gt;&lt;A href="https://www.nxp.com/docs/en/data-sheet/LPC553x.pdf" target="_self"&gt;LPC5536 product data sheet&lt;/A&gt;&lt;/LI&gt;&lt;/UL&gt;</description>
    <pubDate>Tue, 31 Oct 2023 10:54:57 GMT</pubDate>
    <dc:creator>danielholala</dc:creator>
    <dc:date>2023-10-31T10:54:57Z</dc:date>
    <item>
      <title>Correctly powering LPC553x: VBAT, VDDIO, "output capacitor" (LPC5536)</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1749476#M54589</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I have doubts making sense of the documentation regarding correctly powering the LPC5536 and I don't want to guess. Thus I'm asking for help.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;First, where should I connect VBAT pin to?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;The "product data sheet" states that this pin is a "battery supply". I don't have a battery in my design. AN13528 ("Using LDO feature...") does not show VBAT in any figure. Only VDD_MAIN is shown. AN13707 ("Hardware design guidelines") requests that "VBAT pin requires a &lt;STRONG&gt;separate &lt;/STRONG&gt;power supply". Does that mean I cannot connect VDD_MAIN and VBAT on the PCB? On LPC5536-EVK schematic both VDD_MAIN (schematic: "MCU_MAIN") and VBAT (schematic "MCU_VBAT") are connected to the same 3V3 power supply line, though.&amp;nbsp;That's confusing.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_0-1698748084233.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/247713i12F5BE5810C0C1DA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_0-1698748084233.png" alt="danielholala_0-1698748084233.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I'm planning&lt;/STRONG&gt; on connecting both VDD_MAIN and VBAT to the same 3V3 supply but using separate banks of decoupling capacitors as seen in AN13707, Figure 1:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_0-1698749468263.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/247724i2E7DC4B9BA55F36B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_0-1698749468263.png" alt="danielholala_0-1698749468263.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Does that make sense?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Second, what about decoupling capacitors for VDDIO pins?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;AN13707 ("Hardware design guidelines") does not request (let alone discuss) decoupling capacitors for VDDIO pins. Though, LPC5536-EVK schematic shows 9 decoupling capacitors for the 6 VDDIO pins.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_1-1698748231797.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/247714iE62DA4B61BD06DDF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_1-1698748231797.png" alt="danielholala_1-1698748231797.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I'm planning&lt;/STRONG&gt; a single 100 nF capacitor at each VDDIO pin.&lt;/P&gt;&lt;P&gt;Is that sufficient?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Third, what is the "output capacitor"?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;AN13528 ("Using LDO feature...") states that "The &lt;STRONG&gt;minimum&lt;/STRONG&gt; &lt;STRONG&gt;value&lt;/STRONG&gt; of the output capacitor is &lt;STRONG&gt;10 μF&lt;/STRONG&gt;". There are C1 - C4 shown in the schematics and tables, e.g., see Figure 2 below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_2-1698748345988.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/247715iB39CF9CF943B66AA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_2-1698748345988.png" alt="danielholala_2-1698748345988.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;The application note does not explicitly state which one is the output capacitor. First candidate is C1 but it is listed as typically 4.7 uF , see Table 4. This does not meet the minimum requirement quoted above. Next candidate is C2 as it has a minimum of 10 uF. However, is is connected to the power supply and as such considered an "input capacitor". I don't want to guess. Please tell me which one it is the output capacitor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;I'm planning&lt;/STRONG&gt; on using a 10 μF ceramic capacitor for C1 (and for C2, to simplify component variety).&lt;/P&gt;&lt;P&gt;Does that fit?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks.&lt;BR /&gt;Best regards,&lt;BR /&gt;Daniel&lt;/P&gt;&lt;P&gt;Links for your reference:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;A href="https://www.nxp.com/docs/en/nxp/application-notes/AN13528.pdf" target="_self"&gt;AN13528 ("Using LDO feature...")&lt;/A&gt;&lt;/LI&gt;&lt;LI&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN13707.pdf" target="_self"&gt;AN13707 ("Hardware design guidelines")&lt;/A&gt;&lt;/LI&gt;&lt;LI&gt;&lt;A href="https://www.nxp.com/docs/en/data-sheet/LPC553x.pdf" target="_self"&gt;LPC5536 product data sheet&lt;/A&gt;&lt;/LI&gt;&lt;/UL&gt;</description>
      <pubDate>Tue, 31 Oct 2023 10:54:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1749476#M54589</guid>
      <dc:creator>danielholala</dc:creator>
      <dc:date>2023-10-31T10:54:57Z</dc:date>
    </item>
    <item>
      <title>Re: Correctly powering LPC553x: VBAT, VDDIO, "output capacitor" (LPC5536)</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1750195#M54603</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/139806"&gt;@danielholala&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;It seems the same with your another case, I will reply you on that case, thanks.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;</description>
      <pubDate>Wed, 01 Nov 2023 09:51:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1750195#M54603</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2023-11-01T09:51:08Z</dc:date>
    </item>
    <item>
      <title>Re: Correctly powering LPC553x: VBAT, VDDIO, "output capacitor" (LPC5536)</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1753470#M54656</link>
      <description>&lt;P&gt;Regarding correctly powering LPC553x, I have further issues with the&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/nxp/application-notes/AN13528.pdf" target="_self" rel="nofollow noreferrer"&gt;AN13528 ("Using the DC-DC and LDO Features on the LPC553x")&lt;/A&gt;:&lt;/P&gt;&lt;P&gt;The layout recommendation on page 6, Figure 3 does not show LPC553x as it routes signals that are not available on the LPC553x MCU&amp;nbsp; (e.g., "FB" , "VBAT_DCDC", "VDD_PMU").&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielholala_0-1699354942790.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/248804i7089FECEB4A68FFF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielholala_0-1699354942790.png" alt="danielholala_0-1699354942790.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;If you have used&amp;nbsp; the LPC552x MCU family before, you'll notice that this image is a copy of "AN12325&lt;BR /&gt;Using the DCDC feature" showing (most likely) a LPC552x device.&lt;/P&gt;&lt;P&gt;Is it too much to ask if I am expecting an actual layout of an LPC553x MCU in an application note specifically on an LPC553x MCU? What about showing the layout of the LPC5536-EVK, for example?&lt;/P&gt;&lt;P&gt;Thanks.&lt;BR /&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Tue, 07 Nov 2023 11:13:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1753470#M54656</guid>
      <dc:creator>danielholala</dc:creator>
      <dc:date>2023-11-07T11:13:28Z</dc:date>
    </item>
    <item>
      <title>Re: Correctly powering LPC553x: VBAT, VDDIO, "output capacitor" (LPC5536)</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1766326#M54832</link>
      <description>&lt;P&gt;Hello!&lt;/P&gt;&lt;P&gt;I'd like to share what I found out so far.&lt;/P&gt;&lt;P&gt;Regarding&amp;nbsp;&lt;STRONG&gt;VBAT pin:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;VDD_MAIN and VBAT can be connected to the same supply - unless you need to handle deep power down modes.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Regarding&amp;nbsp;&lt;STRONG&gt;decoupling capacitors for VDDIO pins:&lt;/STRONG&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;From the LPC5536-EVK board files I gleaned the following decoupling capacitors configuration:&lt;/SPAN&gt;&lt;/P&gt;&lt;TABLE border="0" cellspacing="0"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD width="97.2656px" height="25px"&gt;&lt;STRONG&gt;Symbol&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;&lt;STRONG&gt;Pin&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="57.25px" height="25px"&gt;&lt;STRONG&gt;100nF&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;&lt;STRONG&gt;1uF&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="52.7969px" height="25px"&gt;&lt;STRONG&gt;4.7uF&lt;/STRONG&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="97.2656px" height="25px"&gt;VDDIO_1_1&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;12&lt;/TD&gt;&lt;TD width="57.25px" height="25px"&gt;x&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;&amp;nbsp;&lt;/TD&gt;&lt;TD width="52.7969px" height="25px"&gt;&amp;nbsp;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="97.2656px" height="25px"&gt;VDDIO_1_2&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;43&lt;/TD&gt;&lt;TD width="57.25px" height="25px"&gt;x&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;x&lt;/TD&gt;&lt;TD width="52.7969px" height="25px"&gt;&amp;nbsp;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="97.2656px" height="25px"&gt;VDDIO_2_1&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;63&lt;/TD&gt;&lt;TD width="57.25px" height="25px"&gt;x&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;x&lt;/TD&gt;&lt;TD width="52.7969px" height="25px"&gt;&amp;nbsp;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="97.2656px" height="25px"&gt;VDDIO_2_2&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;74&lt;/TD&gt;&lt;TD width="57.25px" height="25px"&gt;x&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;&amp;nbsp;&lt;/TD&gt;&lt;TD width="52.7969px" height="25px"&gt;x&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="97.2656px" height="26px"&gt;VDDIO_2_3&lt;/TD&gt;&lt;TD width="40px" height="26px"&gt;85&lt;/TD&gt;&lt;TD width="57.25px" height="26px"&gt;&amp;nbsp;&lt;/TD&gt;&lt;TD width="40px" height="26px"&gt;x&lt;/TD&gt;&lt;TD width="52.7969px" height="26px"&gt;&amp;nbsp;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="97.2656px" height="25px"&gt;VDDIO_2_4&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;96&lt;/TD&gt;&lt;TD width="57.25px" height="25px"&gt;x&lt;/TD&gt;&lt;TD width="40px" height="25px"&gt;&amp;nbsp;&lt;/TD&gt;&lt;TD&gt;&amp;nbsp;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I&lt;/SPAN&gt;&lt;SPAN&gt; have no idea why the designers of the LPC5536-EVK decided to place the decoupling capacitors as they did, e.g., why VDDIO_2_2 get's a 4.7 uF and the others do&lt;/SPAN&gt;&lt;SPAN&gt;n't.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;That's for the 100 pin package.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I will be using just 100 nF on each VDDIO pin on the 64 pin package.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Regarding&amp;nbsp;&lt;STRONG&gt;"output capacitor" mentioned in &lt;SPAN&gt;AN13528&lt;/SPAN&gt;:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;C1 is the "output capacitor". There are two usages for C1:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;when using the DC-DC converter (Figure 1), the minimum value of C1 is 10 μF (see Table 1);&lt;/LI&gt;&lt;LI&gt;when using the internal LDO (Figure 2), the typical value for C1 is 4.7 μF (see Table 4).&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I hope somebody will find this useful.&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 30 Nov 2023 08:41:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Correctly-powering-LPC553x-VBAT-VDDIO-quot-output-capacitor-quot/m-p/1766326#M54832</guid>
      <dc:creator>danielholala</dc:creator>
      <dc:date>2023-11-30T08:41:54Z</dc:date>
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