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    <title>topic Re: LPC5536 DMA transfers less data than expeced in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1724463#M54117</link>
    <description>&lt;P&gt;Hello Alice,&lt;/P&gt;&lt;P&gt;it seems that the RESFIFO is read 3 times per DMA trigger despite being configured to be read 9 times with&lt;/P&gt;&lt;P&gt;g_XferConfig = DMA_CHANNEL_XFER(false, true, true, false, sizeof(uint32_t), kDMA_AddressInterleave0xWidth, kDMA_AddressInterleave1xWidth, 9 * sizeof(uint32_t));&lt;/P&gt;&lt;P&gt;There is data left in the RESFIFO, I have checked that using manual reads after the DMA was triggered&lt;/P&gt;&lt;P&gt;I can scale the reads down to 1 and 2 replacing the 9 in the config above by 1 and 2 but starting at 4, the DMA only reads 3 times.&lt;/P&gt;&lt;P&gt;Is there a hidden limit on how many bytes can be transfered per DMA trigger?&lt;/P&gt;</description>
    <pubDate>Mon, 18 Sep 2023 06:20:49 GMT</pubDate>
    <dc:creator>orange_chris</dc:creator>
    <dc:date>2023-09-18T06:20:49Z</dc:date>
    <item>
      <title>LPC5536 DMA transfers less data than expeced</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1722827#M54093</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I have an application with the LPC5536 where I have to sample 3 ADC channels in rapid succession at 3 very distinct points of time. The idea is to trigger them with a SCT channel, collect the 9 (3 x 3) values in the FIFO of the ADC and transfer them off to memory using the DMA when the conversion has finished. However I have run into a problem I don't understand.&lt;/P&gt;&lt;P&gt;I have removed the triggering of the ADC via the SCT for now for easier debugging control. I have set up 3 ADC channels as a sequence with the FIFO watermark set to 8 so that the DMA request happens after the 9th byte&lt;/P&gt;&lt;P&gt;lpadc_conv_command_config_t ADCCommand1 = {kLPADC_SampleChannelSingleEndSideA, 1U, 2, false, 0UL, kLPADC_HardwareAverageCount1, kLPADC_SampleTimeADCK3, kLPADC_HardwareCompareDisabled, 0UL, 0UL, kLPADC_ConversionResolutionStandard, false};&lt;/P&gt;&lt;P&gt;lpadc_conv_command_config_t ADCCommand2 = {kLPADC_SampleChannelSingleEndSideA, 3U, 3, false, 0UL, kLPADC_HardwareAverageCount1, kLPADC_SampleTimeADCK3, kLPADC_HardwareCompareDisabled, 0UL, 0UL, kLPADC_ConversionResolutionStandard, false};&lt;/P&gt;&lt;P&gt;lpadc_conv_command_config_t ADCCommand3&amp;nbsp; = {kLPADC_SampleChannelSingleEndSideA, 8U, 0, false, 0UL, kLPADC_HardwareAverageCount1, kLPADC_SampleTimeADCK3, kLPADC_HardwareCompareDisabled, 0UL, 0UL, kLPADC_ConversionResolutionStandard, false};&lt;/P&gt;&lt;P&gt;LPADC_SetConvCommandConfig(ADC0, 1, &amp;amp;ADCCommand1);&lt;BR /&gt;LPADC_SetConvCommandConfig(ADC0, 2, &amp;amp;ADCCommand2);&lt;BR /&gt;LPADC_SetConvCommandConfig(ADC0, 3, &amp;amp;ADCCommand3);&lt;/P&gt;&lt;P&gt;const lpadc_config_t ADC_Config = {true, kLPADC_ConversionAverage1, true, 0x80UL, kLPADC_ReferenceVoltageAlt3, kLPADC_PowerLevelAlt1, kLPADC_TriggerPriorityPreemptImmediately, false, 0UL, 8UL, 0UL};&lt;BR /&gt;LPADC_Init(ADC0, &amp;amp;ADC_Config);&lt;/P&gt;&lt;P&gt;LPADC_EnableFIFO0WatermarkDMA(ADC0, true);&lt;/P&gt;&lt;P&gt;I have also set up a DMA channel to transfer the data:&lt;/P&gt;&lt;P&gt;g_XferConfig = DMA_CHANNEL_XFER(false, true, false, false, sizeof(uint32_t), kDMA_AddressInterleave0xWidth, kDMA_AddressInterleave1xWidth, 9 * sizeof(uint32_t));&lt;BR /&gt;&lt;BR /&gt;DMA_PrepareChannelTransfer(&amp;amp;DMAChannelConfigStruct, (void*)(&amp;amp;(BSP_SENSOR_ADC-&amp;gt;RESFIFO[0])), (void *)Sensor_ADC_Buffer, g_XferConfig, kDMA_PeripheralToMemory, NULL, NULL);&lt;BR /&gt;(void)DMA_SubmitChannelTransfer(&amp;amp;ADC_DMA_Handle, &amp;amp;DMAChannelConfigStruct);&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;The behaviour if I trigger the ADC via software trigger is:&lt;BR /&gt;I can see the ADC sampling 3 values on each trigger as expected (by watching the FIFO level register)&lt;/LI&gt;&lt;LI&gt;On the first 2 triggers no data is transfered as expected since the FIFO level is still below the threshold&lt;/LI&gt;&lt;LI&gt;On the 3rd trigger data is transfered via the DMA but only 3 uint32_t values instead of the expected 9&lt;/LI&gt;&lt;LI&gt;As a consequnence, the FIFO level is only lowered by 3 and not down to zero as expected and a a consequence of that on every further trigger 3 more values are transfered and the FIFO level always bonces up and down but the FIFO never gets emptied.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Why does the DMA transfer only a third of the bytes configured? The "9 * sizeof(uint32_t)" bytes in the xfer config look correct to me and they are correctly converted into 9 transfers (leading to the XFERCOUNT field in the XFERCFG register set to 8).&lt;/P&gt;&lt;P&gt;Up front, I am not allowed to upload my project and it is on a custom hardware and not on an evaluation board anyway.&lt;/P&gt;&lt;P&gt;EDIT: I have noticed that I did not have the DMA_SetupDescriptor() call like in the lpadc_dma example and have added that but the behaviour did not change. I still wonder what the descriptors do because the SRAMBASE register mentioned in the RM always points to the s_dma_descriptor_table0 table in the library.&lt;/P&gt;</description>
      <pubDate>Thu, 14 Sep 2023 11:56:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1722827#M54093</guid>
      <dc:creator>orange_chris</dc:creator>
      <dc:date>2023-09-14T11:56:59Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5536 DMA transfers less data than expeced</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1724347#M54113</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/221925"&gt;@orange_chris&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;How many time reads RESFIFO for one DMA trigger?&lt;/P&gt;
&lt;P&gt;The FIFO can be emptied by successive reads of RESFIFO.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;</description>
      <pubDate>Mon, 18 Sep 2023 03:12:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1724347#M54113</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2023-09-18T03:12:17Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5536 DMA transfers less data than expeced</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1724463#M54117</link>
      <description>&lt;P&gt;Hello Alice,&lt;/P&gt;&lt;P&gt;it seems that the RESFIFO is read 3 times per DMA trigger despite being configured to be read 9 times with&lt;/P&gt;&lt;P&gt;g_XferConfig = DMA_CHANNEL_XFER(false, true, true, false, sizeof(uint32_t), kDMA_AddressInterleave0xWidth, kDMA_AddressInterleave1xWidth, 9 * sizeof(uint32_t));&lt;/P&gt;&lt;P&gt;There is data left in the RESFIFO, I have checked that using manual reads after the DMA was triggered&lt;/P&gt;&lt;P&gt;I can scale the reads down to 1 and 2 replacing the 9 in the config above by 1 and 2 but starting at 4, the DMA only reads 3 times.&lt;/P&gt;&lt;P&gt;Is there a hidden limit on how many bytes can be transfered per DMA trigger?&lt;/P&gt;</description>
      <pubDate>Mon, 18 Sep 2023 06:20:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1724463#M54117</guid>
      <dc:creator>orange_chris</dc:creator>
      <dc:date>2023-09-18T06:20:49Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5536 DMA transfers less data than expeced</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1725371#M54131</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/221925"&gt;@orange_chris&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;How about first change and tested base on adc_dma demo under SDK, if still can't work as your requirements, send the project to me , I help to check on LPCxpresso5536-evk board, I think it is easy to find problem by debugging.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 19 Sep 2023 08:48:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1725371#M54131</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2023-09-19T08:48:09Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5536 DMA transfers less data than expeced</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1726372#M54148</link>
      <description>&lt;P&gt;Hello Alice,&lt;/P&gt;&lt;P&gt;I have found out that it is trivial to reproduce. Just open the lpadc_demo project from the SDK and increase DEMO_CADC_SAMPLE_COUNT to anything above 3. You will see that the ADC indeed samples additional sample but they are never transfered into RAM despite the transfer being configured to be DEMO_CADC_SAMPLE_COUNT * sizeof(uint32_t) bytes.&lt;/P&gt;&lt;P&gt;BR,&lt;BR /&gt;Christian&lt;/P&gt;</description>
      <pubDate>Wed, 20 Sep 2023 13:40:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1726372#M54148</guid>
      <dc:creator>orange_chris</dc:creator>
      <dc:date>2023-09-20T13:40:14Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5536 DMA transfers less data than expeced</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1735522#M54304</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/221925"&gt;@orange_chris&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Sorry to reply you late, I came back from public holiday yesterday, and I know Guenter is helping you about this case, he will tell you the answer .ASAP.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;</description>
      <pubDate>Mon, 09 Oct 2023 06:25:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1735522#M54304</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2023-10-09T06:25:37Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5536 DMA transfers less data than expeced</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1958756#M56893</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have the same issue. For one request I get 3 reads. &lt;SPAN class=""&gt;Could you share the solution?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot.&lt;/P&gt;</description>
      <pubDate>Fri, 20 Sep 2024 11:27:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5536-DMA-transfers-less-data-than-expeced/m-p/1958756#M56893</guid>
      <dc:creator>nobodyKnows</dc:creator>
      <dc:date>2024-09-20T11:27:23Z</dc:date>
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