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    <title>topic Re: PCB layout for LPC-Link2 development board in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1701054#M53780</link>
    <description>&lt;P&gt;Thank you!&lt;/P&gt;&lt;P&gt;Yes I am hoping to get away with 4 layers too, but shouldn't have too much trouble thanks to this example.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Quinn&lt;/P&gt;</description>
    <pubDate>Tue, 08 Aug 2023 11:07:55 GMT</pubDate>
    <dc:creator>QM</dc:creator>
    <dc:date>2023-08-08T11:07:55Z</dc:date>
    <item>
      <title>PCB layout for LPC-Link2 development board</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1694520#M53616</link>
      <description>&lt;P&gt;Hello NXP community,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have been a using the lpc-link2 development board for a project that I have been working on for the past 3 years. Recently I have found it difficult to purchase more of this dev board (it is a bit old at this point) but am still keen to continue working with the lpc4370 chip.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am planning on mostly replicating the link2 using the lpc4370, and have been referring to the schematic file provided online. However I am wondering if it would also be possible to get access to PCB layout files? Or are these considered IP / trade secret?&lt;/P&gt;&lt;P&gt;I also wonder how other companies distribute PCB files for manufacturing their dev boards, as I believe the same Arduino board designs are manufactured by a range of companies, for example. Or am I mistaken...?&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Quinn &amp;nbsp; &amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 28 Jul 2023 00:21:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1694520#M53616</guid>
      <dc:creator>QM</dc:creator>
      <dc:date>2023-07-28T00:21:43Z</dc:date>
    </item>
    <item>
      <title>Re: PCB layout for LPC-Link2 development board</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1694527#M53617</link>
      <description>&lt;P&gt;You might want to check with Embedded Artists.&amp;nbsp;&amp;nbsp; The did the design of the board.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.embeddedartists.com/products/lpc-link2/" target="_blank"&gt;https://www.embeddedartists.com/products/lpc-link2/&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have a very simple design for a castellated via module that uses the LPC4370.&amp;nbsp;&amp;nbsp;&amp;nbsp; The format is Altium Designer.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-Eli&lt;/P&gt;</description>
      <pubDate>Fri, 28 Jul 2023 00:32:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1694527#M53617</guid>
      <dc:creator>Eli_H</dc:creator>
      <dc:date>2023-07-28T00:32:19Z</dc:date>
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    <item>
      <title>Re: PCB layout for LPC-Link2 development board</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1694537#M53618</link>
      <description>&lt;P&gt;Hi Eli,&lt;/P&gt;&lt;P&gt;Thanks for your prompt response. I have emailed embedded artists so hopefully they will be kind enough to share their files.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Would you be comfortable sharing your design? My main concern is designing for a 100 bga chip, which I have not done before. I wonder about track width/spacing and how many layers I will need. There should be plenty of resources online to help with this too.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Quinn&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 28 Jul 2023 01:11:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1694537#M53618</guid>
      <dc:creator>QM</dc:creator>
      <dc:date>2023-07-28T01:11:06Z</dc:date>
    </item>
    <item>
      <title>Re: PCB layout for LPC-Link2 development board</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1695189#M53634</link>
      <description>&lt;P&gt;See attached files.&amp;nbsp; &amp;nbsp;This was a design I did about 5 years ago.&amp;nbsp; &amp;nbsp; (I removed some of the branding/names).&amp;nbsp; &amp;nbsp; &amp;nbsp; There are the Altium files as well as .pdfs of the schematic, gerbers, PCB notes, assembly drawings, etc.&lt;/P&gt;
&lt;P&gt;This was built as a castellated via module.&amp;nbsp; &amp;nbsp;It was to intended to be a highspeed digitizer for an ultrasonic signal.&amp;nbsp; &amp;nbsp; &amp;nbsp;It was built/prototyped with some software development.&amp;nbsp; &amp;nbsp;No known issues but use at your own risk.&amp;nbsp; &amp;nbsp;I only checked the interfaces that were critical to our experiment.&amp;nbsp; Should be enough to get you started.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Eli_H_0-1690572494461.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/234181iA678AAC95ED8677A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Eli_H_0-1690572494461.png" alt="Eli_H_0-1690572494461.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 28 Jul 2023 19:32:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1695189#M53634</guid>
      <dc:creator>Eli_H</dc:creator>
      <dc:date>2023-07-28T19:32:43Z</dc:date>
    </item>
    <item>
      <title>Re: PCB layout for LPC-Link2 development board</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1695190#M53635</link>
      <description>&lt;P&gt;BTW:&amp;nbsp; Feel free to reach out via email if you need layout help.&amp;nbsp; &amp;nbsp; &amp;nbsp; It would be possible to it pinned out on 4 layers, you just might have to eat into your internal reference planes.&amp;nbsp; 6 gives you some breathing room.&amp;nbsp; &amp;nbsp; I didn't need all of the IO so it this one ways done on 4. The low cost services like JLCPCB can easily handle the required geometries, etc.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 28 Jul 2023 19:39:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1695190#M53635</guid>
      <dc:creator>Eli_H</dc:creator>
      <dc:date>2023-07-28T19:39:25Z</dc:date>
    </item>
    <item>
      <title>Re: PCB layout for LPC-Link2 development board</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1701054#M53780</link>
      <description>&lt;P&gt;Thank you!&lt;/P&gt;&lt;P&gt;Yes I am hoping to get away with 4 layers too, but shouldn't have too much trouble thanks to this example.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Quinn&lt;/P&gt;</description>
      <pubDate>Tue, 08 Aug 2023 11:07:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/PCB-layout-for-LPC-Link2-development-board/m-p/1701054#M53780</guid>
      <dc:creator>QM</dc:creator>
      <dc:date>2023-08-08T11:07:55Z</dc:date>
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